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David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71945 )
Change subject: soc/intel/xeon_sp: add ebg (Emmitsburg PCH) directory
......................................................................
Patch Set 11:
(2 comments)
File src/soc/intel/xeon_sp/ebg/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/71945/comment/21d9e469_1e09d9ae
PS8, Line 187: #define GPP_E20 132
: #define GPP_E21 133
: #define GPP_E22 134
: #define GPP_E23 135
These fields are not defined in EDS but can be found while using Cscript. […]
I see them now - they are mentioned in the GPI_NMI_EN_GPP_E_0 register, but not in certain other registers like other GPIOs in this community.
Thanks for double-checking!
https://review.coreboot.org/c/coreboot/+/71945/comment/8f667833_2296af35
PS8, Line 192: GPP_E23
Although GPP_E23 is not defined in EDS but it does exist, should we change this to GPP_E19?
No, let's keep this as-is with GPP_E23 since it exists as you say.
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