Change in coreboot[master]: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46725 ) Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... sb/intel/lynxpoint/lpc.c: Simplify PM init sequence This sequence used to be an array of reg-and-or triplets, but can be simplified. The resulting sequence is closer to what Broadwell does. Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- M src/southbridge/intel/lynxpoint/lpc.c 1 file changed, 42 insertions(+), 42 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/46725/1 diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 9018a1c..8360ce6 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -291,49 +291,49 @@ RCBA32_AND_OR(0x232c, ~1, 0x00000000); RCBA32_AND_OR(0x1100, ~0xc000, 0xc000); - RCBA32_AND_OR(0x1100, ~0, 0x00000100); - RCBA32_AND_OR(0x1100, ~0, 0x0000003f); + RCBA32_OR(0x1100, 0x00000100); + RCBA32_OR(0x1100, 0x0000003f); RCBA32_AND_OR(0x2320, ~0x60, 0x10); - RCBA32_AND_OR(0x3314, 0, 0x00012fff); - RCBA32_AND_OR(0x3318, 0, 0x0dcf0400); - RCBA32_AND_OR(0x3324, 0, 0x04000000); - RCBA32_AND_OR(0x3368, 0, 0x00041400); - RCBA32_AND_OR(0x3388, 0, 0x3f8ddbff); - RCBA32_AND_OR(0x33ac, 0, 0x00007001); - RCBA32_AND_OR(0x33b0, 0, 0x00181900); - RCBA32_AND_OR(0x33c0, 0, 0x00060A00); - RCBA32_AND_OR(0x33d0, 0, 0x06200840); - RCBA32_AND_OR(0x3a28, 0, 0x01010101); - RCBA32_AND_OR(0x3a2c, 0, 0x04040404); - RCBA32_AND_OR(0x2b1c, 0, 0x03808033); - RCBA32_AND_OR(0x2b34, 0, 0x80000009); - RCBA32_AND_OR(0x3348, 0, 0x022ddfff); - RCBA32_AND_OR(0x334c, 0, 0x00000001); - RCBA32_AND_OR(0x3358, 0, 0x0001c000); - RCBA32_AND_OR(0x3380, 0, 0x3f8ddbff); - RCBA32_AND_OR(0x3384, 0, 0x0001c7e1); - RCBA32_AND_OR(0x338c, 0, 0x0001c7e1); - RCBA32_AND_OR(0x3398, 0, 0x0001c000); - RCBA32_AND_OR(0x33a8, 0, 0x00181900); - RCBA32_AND_OR(0x33dc, 0, 0x00080000); - RCBA32_AND_OR(0x33e0, 0, 0x00000001); - RCBA32_AND_OR(0x3a20, 0, 0x00000404); - RCBA32_AND_OR(0x3a24, 0, 0x01010101); - RCBA32_AND_OR(0x3a30, 0, 0x01010101); - RCBA32_AND_OR(0x0410, ~0, 0x00000003); - RCBA32_AND_OR(0x2618, ~0, 0x08000000); - RCBA32_AND_OR(0x2300, ~0, 0x00000002); - RCBA32_AND_OR(0x2600, ~0, 0x00000008); - RCBA32_AND_OR(0x33b4, 0, 0x00007001); - RCBA32_AND_OR(0x3350, 0, 0x022ddfff); - RCBA32_AND_OR(0x3354, 0, 0x00000001); - RCBA32_AND_OR(0x33d4, ~0, 0x08000000); /* Power Optimizer */ - RCBA32_AND_OR(0x33c8, ~0, 0x00000080); /* Power Optimizer */ - RCBA32_AND_OR(0x2b10, 0, 0x0000883c); /* Power Optimizer */ - RCBA32_AND_OR(0x2b14, 0, 0x1e0a4616); /* Power Optimizer */ - RCBA32_AND_OR(0x2b24, 0, 0x40000005); /* Power Optimizer */ - RCBA32_AND_OR(0x2b20, 0, 0x0005db01); /* Power Optimizer */ - RCBA32_AND_OR(0x3a80, 0, 0x05145005); + RCBA32(0x3314) = 0x00012fff; + RCBA32(0x3318) = 0x0dcf0400; + RCBA32(0x3324) = 0x04000000; + RCBA32(0x3368) = 0x00041400; + RCBA32(0x3388) = 0x3f8ddbff; + RCBA32(0x33ac) = 0x00007001; + RCBA32(0x33b0) = 0x00181900; + RCBA32(0x33c0) = 0x00060A00; + RCBA32(0x33d0) = 0x06200840; + RCBA32(0x3a28) = 0x01010101; + RCBA32(0x3a2c) = 0x04040404; + RCBA32(0x2b1c) = 0x03808033; + RCBA32(0x2b34) = 0x80000009; + RCBA32(0x3348) = 0x022ddfff; + RCBA32(0x334c) = 0x00000001; + RCBA32(0x3358) = 0x0001c000; + RCBA32(0x3380) = 0x3f8ddbff; + RCBA32(0x3384) = 0x0001c7e1; + RCBA32(0x338c) = 0x0001c7e1; + RCBA32(0x3398) = 0x0001c000; + RCBA32(0x33a8) = 0x00181900; + RCBA32(0x33dc) = 0x00080000; + RCBA32(0x33e0) = 0x00000001; + RCBA32(0x3a20) = 0x00000404; + RCBA32(0x3a24) = 0x01010101; + RCBA32(0x3a30) = 0x01010101; + RCBA32_OR(0x0410, 0x00000003); + RCBA32_OR(0x2618, 0x08000000); + RCBA32_OR(0x2300, 0x00000002); + RCBA32_OR(0x2600, 0x00000008); + RCBA32(0x33b4) = 0x00007001; + RCBA32(0x3350) = 0x022ddfff; + RCBA32(0x3354) = 0x00000001; + RCBA32_OR(0x33d4, 0x08000000); /* Power Optimizer */ + RCBA32_OR(0x33c8, 0x00000080); /* Power Optimizer */ + RCBA32(0x2b10) = 0x0000883c; /* Power Optimizer */ + RCBA32(0x2b14) = 0x1e0a4616; /* Power Optimizer */ + RCBA32(0x2b24) = 0x40000005; /* Power Optimizer */ + RCBA32(0x2b20) = 0x0005db01; /* Power Optimizer */ + RCBA32(0x3a80) = 0x05145005; pci_or_config32(dev, 0xac, 1 << 21); -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-MessageType: newchange
Hello Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46725 to look at the new patch set (#2). Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... sb/intel/lynxpoint/lpc.c: Simplify PM init sequence This sequence used to be an array of reg-and-or triplets, but can be simplified. The resulting sequence is closer to what Broadwell does. Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- M src/southbridge/intel/lynxpoint/lpc.c 1 file changed, 42 insertions(+), 42 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/46725/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46725 to look at the new patch set (#5). Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... sb/intel/lynxpoint/lpc.c: Simplify PM init sequence This sequence used to be an array of reg-and-or triplets, but can be simplified. The resulting sequence is closer to what Broadwell does. Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- M src/southbridge/intel/lynxpoint/lpc.c 1 file changed, 42 insertions(+), 42 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/46725/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46725 to look at the new patch set (#7). Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... sb/intel/lynxpoint/lpc.c: Simplify PM init sequence This sequence used to be an array of reg-and-or triplets, but can be simplified. The resulting sequence is closer to what Broadwell does. Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- M src/southbridge/intel/lynxpoint/lpc.c 1 file changed, 42 insertions(+), 42 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/46725/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 7 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-MessageType: newpatchset
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46725 ) Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... Patch Set 12: Code-Review+1 (1 comment) https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... File src/southbridge/intel/lynxpoint/lpc.c: https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... PS12, Line 336: RCBA32(0x3a80) = tbh I'm not sure if I like this way of setting registers... wouldn't it be better to introduce something like rcba32(reg, val) as we do with all other registers? -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 12 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss@mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Comment-Date: Fri, 30 Oct 2020 06:43:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46725 ) Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... Patch Set 12: (1 comment) https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... File src/southbridge/intel/lynxpoint/lpc.c: https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... PS12, Line 336: RCBA32(0x3a80) =
tbh I'm not sure if I like this way of setting registers... […] MCHBAR, DMIBAR and EPBAR also use this type of operations. I guess I could make `rcba_write32` and friends to handle this. I've already written Haswell raminit using mchbarx_read and mchbarx_write functions because I need to do pure 64-bit register writes (the write must be atomic, thus cannot be two 32-bit writes), and MCHBARx macros were inconsistent.
If I do it properly, all platforms should be reproducible. But if I first deduplicate the code for Broadwell, I will have less work to do 😄 -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 12 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss@mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Comment-Date: Fri, 30 Oct 2020 09:19:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner <foss@mniewoehner.de> Gerrit-MessageType: comment
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46725 ) Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... Patch Set 12: Code-Review+2 (1 comment) https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... File src/southbridge/intel/lynxpoint/lpc.c: https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... PS12, Line 336: RCBA32(0x3a80) =
MCHBAR, DMIBAR and EPBAR also use this type of operations. […] ack
-- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 12 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss@mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Comment-Date: Mon, 02 Nov 2020 10:19:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons <th3fanbus@gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss@mniewoehner.de> Gerrit-MessageType: comment
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46725 ) Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... sb/intel/lynxpoint/lpc.c: Simplify PM init sequence This sequence used to be an array of reg-and-or triplets, but can be simplified. The resulting sequence is closer to what Broadwell does. Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46725 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> --- M src/southbridge/intel/lynxpoint/lpc.c 1 file changed, 42 insertions(+), 42 deletions(-) Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 0e6fe64..23066ebd 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -291,49 +291,49 @@ RCBA32_AND_OR(0x232c, ~1, 0x00000000); RCBA32_AND_OR(0x1100, ~0xc000, 0xc000); - RCBA32_AND_OR(0x1100, ~0, 0x00000100); - RCBA32_AND_OR(0x1100, ~0, 0x0000003f); + RCBA32_OR(0x1100, 0x00000100); + RCBA32_OR(0x1100, 0x0000003f); RCBA32_AND_OR(0x2320, ~0x60, 0x10); - RCBA32_AND_OR(0x3314, 0, 0x00012fff); - RCBA32_AND_OR(0x3318, 0, 0x0dcf0400); - RCBA32_AND_OR(0x3324, 0, 0x04000000); - RCBA32_AND_OR(0x3368, 0, 0x00041400); - RCBA32_AND_OR(0x3388, 0, 0x3f8ddbff); - RCBA32_AND_OR(0x33ac, 0, 0x00007001); - RCBA32_AND_OR(0x33b0, 0, 0x00181900); - RCBA32_AND_OR(0x33c0, 0, 0x00060A00); - RCBA32_AND_OR(0x33d0, 0, 0x06200840); - RCBA32_AND_OR(0x3a28, 0, 0x01010101); - RCBA32_AND_OR(0x3a2c, 0, 0x04040404); - RCBA32_AND_OR(0x2b1c, 0, 0x03808033); - RCBA32_AND_OR(0x2b34, 0, 0x80000009); - RCBA32_AND_OR(0x3348, 0, 0x022ddfff); - RCBA32_AND_OR(0x334c, 0, 0x00000001); - RCBA32_AND_OR(0x3358, 0, 0x0001c000); - RCBA32_AND_OR(0x3380, 0, 0x3f8ddbff); - RCBA32_AND_OR(0x3384, 0, 0x0001c7e1); - RCBA32_AND_OR(0x338c, 0, 0x0001c7e1); - RCBA32_AND_OR(0x3398, 0, 0x0001c000); - RCBA32_AND_OR(0x33a8, 0, 0x00181900); - RCBA32_AND_OR(0x33dc, 0, 0x00080000); - RCBA32_AND_OR(0x33e0, 0, 0x00000001); - RCBA32_AND_OR(0x3a20, 0, 0x00000404); - RCBA32_AND_OR(0x3a24, 0, 0x01010101); - RCBA32_AND_OR(0x3a30, 0, 0x01010101); - RCBA32_AND_OR(0x0410, ~0, 0x00000003); - RCBA32_AND_OR(0x2618, ~0, 0x08000000); - RCBA32_AND_OR(0x2300, ~0, 0x00000002); - RCBA32_AND_OR(0x2600, ~0, 0x00000008); - RCBA32_AND_OR(0x33b4, 0, 0x00007001); - RCBA32_AND_OR(0x3350, 0, 0x022ddfff); - RCBA32_AND_OR(0x3354, 0, 0x00000001); - RCBA32_AND_OR(0x33d4, ~0, 0x08000000); /* Power Optimizer */ - RCBA32_AND_OR(0x33c8, ~0, 0x00000080); /* Power Optimizer */ - RCBA32_AND_OR(0x2b10, 0, 0x0000883c); /* Power Optimizer */ - RCBA32_AND_OR(0x2b14, 0, 0x1e0a4616); /* Power Optimizer */ - RCBA32_AND_OR(0x2b24, 0, 0x40000005); /* Power Optimizer */ - RCBA32_AND_OR(0x2b20, 0, 0x0005db01); /* Power Optimizer */ - RCBA32_AND_OR(0x3a80, 0, 0x05145005); + RCBA32(0x3314) = 0x00012fff; + RCBA32(0x3318) = 0x0dcf0400; + RCBA32(0x3324) = 0x04000000; + RCBA32(0x3368) = 0x00041400; + RCBA32(0x3388) = 0x3f8ddbff; + RCBA32(0x33ac) = 0x00007001; + RCBA32(0x33b0) = 0x00181900; + RCBA32(0x33c0) = 0x00060A00; + RCBA32(0x33d0) = 0x06200840; + RCBA32(0x3a28) = 0x01010101; + RCBA32(0x3a2c) = 0x04040404; + RCBA32(0x2b1c) = 0x03808033; + RCBA32(0x2b34) = 0x80000009; + RCBA32(0x3348) = 0x022ddfff; + RCBA32(0x334c) = 0x00000001; + RCBA32(0x3358) = 0x0001c000; + RCBA32(0x3380) = 0x3f8ddbff; + RCBA32(0x3384) = 0x0001c7e1; + RCBA32(0x338c) = 0x0001c7e1; + RCBA32(0x3398) = 0x0001c000; + RCBA32(0x33a8) = 0x00181900; + RCBA32(0x33dc) = 0x00080000; + RCBA32(0x33e0) = 0x00000001; + RCBA32(0x3a20) = 0x00000404; + RCBA32(0x3a24) = 0x01010101; + RCBA32(0x3a30) = 0x01010101; + RCBA32_OR(0x0410, 0x00000003); + RCBA32_OR(0x2618, 0x08000000); + RCBA32_OR(0x2300, 0x00000002); + RCBA32_OR(0x2600, 0x00000008); + RCBA32(0x33b4) = 0x00007001; + RCBA32(0x3350) = 0x022ddfff; + RCBA32(0x3354) = 0x00000001; + RCBA32_OR(0x33d4, 0x08000000); /* Power Optimizer */ + RCBA32_OR(0x33c8, 0x00000080); /* Power Optimizer */ + RCBA32(0x2b10) = 0x0000883c; /* Power Optimizer */ + RCBA32(0x2b14) = 0x1e0a4616; /* Power Optimizer */ + RCBA32(0x2b24) = 0x40000005; /* Power Optimizer */ + RCBA32(0x2b20) = 0x0005db01; /* Power Optimizer */ + RCBA32(0x3a80) = 0x05145005; pci_or_config32(dev, 0xac, 1 << 21); -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 13 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss@mniewoehner.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-MessageType: merged
participants (3)
-
Angel Pons (Code Review) -
Michael Niewöhner (Code Review)
-
Patrick Georgi (Code Review)