the following patch was just integrated into master: commit 7756fe70eb568e1429e244306be9401357cefa43 Author: Gabe Black firstname.lastname@example.org Date: Tue Feb 25 01:40:34 2014 -0800
x86: Minimize work done with the caches disabled in mtrr functions.
The code in src/cpu/x86/mtrr/mtrr.c disables caching in a few places when changing mtrr settings. While I can't find anything that says that's actually required, I can believe it's necessary. With that said, other code around the wrmsr instructions which actually modify the settings should be able to run with caching enabled with no ill effects.
This is particularly true for two calls to printk, one in the fixed mtrr code and one in the variable, which could result in an arbitrary amount of work being done without caching. When changing the implementation of the cbmem console, these two printks caused a significant regression in boot performance on link of about 70ms which is about 10% of total firmware boot time. When the window where the cache is disabled is minimized, both this and the new implementation were about 30ms faster than the original boot time.
For the variable MTRRs, we now store what we want to set the MSRs to and then write them all at once at the end of commit_var_mtrrs(). This way we don't have some set and some not, but we still minimize the time we spend with the caches disabled.
Change-Id: I5139b262bd2d13f79afd88e2e2c0f514fb3e27c9 Signed-off-by: Gabe Black email@example.com Reviewed-on: https://chromium-review.googlesource.com/187811 Reviewed-by: Ronald Minnich firstname.lastname@example.org Reviewed-by: Aaron Durbin email@example.com Commit-Queue: Gabe Black firstname.lastname@example.org Tested-by: Gabe Black email@example.com (cherry picked from commit 31529d6d965676c6cedeb62137eabc26819956fc) Signed-off-by: Isaac Christensen firstname.lastname@example.org Reviewed-on: http://review.coreboot.org/6952 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan email@example.com
See http://review.coreboot.org/6952 for details.