Change in coreboot[master]: soc/intel/jsl: Replace dt `HeciEnabled` by `CSE disable` config - coreboot-gerrit

5 Jan 2022


      Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Patrick Rudolph, EricR Lai.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60728 )
Change subject: soc/intel/jsl: Replace dt `HeciEnabled` by `CSE disable` config
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Patch Set 2:
(1 comment)
Patchset:
PS2: 
What about the intel/jslrvp mainboard? It doesn't specify `HeciEnabled`, so this change would result in the HECI device no longer being hidden.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ib9fb554c8f3cfd1e91bbcd1977905e1321db0802
Gerrit-Change-Number: 60728
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