Change in ...coreboot[master]: mb/google/hatch: Unlock GPIO pads
Krishna P Bhat D has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32126 Change subject: mb/google/hatch: Unlock GPIO pads ...................................................................... mb/google/hatch: Unlock GPIO pads GPP_A12 is being used as FPMCU_RST in hatch. This GPIO is being padlocked in FSP and cannot used in kernel. Hence unlock the GPIO pads to export this pin in kernel to be used as FPMCU_RST. BUG=b:128686027 Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/32126/1 diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index dc7cc24..984852f 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -73,6 +73,8 @@ register "DdiPortBHpd" = "1" register "DdiPortCHpd" = "1" register "tcc_offset" = "10" # TCC of 90C + # Unlock GPIO pads + register "PchUnlockGpioPads" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1 -- To view, visit https://review.coreboot.org/c/coreboot/+/32126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Gerrit-Change-Number: 32126 Gerrit-PatchSet: 1 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-MessageType: newchange
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32126 ) Change subject: mb/google/hatch: Unlock GPIO pads ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/32126/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/32126/1//COMMIT_MSG@13 PS1, Line 13: BUG=b:128686027 Did you test this out? -- To view, visit https://review.coreboot.org/c/coreboot/+/32126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Gerrit-Change-Number: 32126 Gerrit-PatchSet: 1 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan@google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Sat, 30 Mar 2019 17:18:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment
Hello Rizwan Qureshi, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/32126 to look at the new patch set (#2). Change subject: mb/google/hatch: Unlock GPIO pads ...................................................................... mb/google/hatch: Unlock GPIO pads GPP_A12 is being used as FPMCU_RST in hatch. This GPIO is being padlocked in FSP and cannot used in kernel. Hence unlock the GPIO pads to export this pin in kernel to be used as FPMCU_RST. BUG=b:128686027 BRANCH=None TEST=Read Pad Configuration Lock (PADCFGLOCK_GPP_A_0) register. localhost /sys/class/gpio # iotools mmio_read32 0xfd6e0080 0x00000000 localhost /sys/class/gpio # echo 212 > export Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/32126/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/32126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Gerrit-Change-Number: 32126 Gerrit-PatchSet: 2 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan@google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: newpatchset
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32126 ) Change subject: mb/google/hatch: Unlock GPIO pads ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/32126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Gerrit-Change-Number: 32126 Gerrit-PatchSet: 2 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan@google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Mon, 01 Apr 2019 06:23:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32126 ) Change subject: mb/google/hatch: Unlock GPIO pads ...................................................................... mb/google/hatch: Unlock GPIO pads GPP_A12 is being used as FPMCU_RST in hatch. This GPIO is being padlocked in FSP and cannot used in kernel. Hence unlock the GPIO pads to export this pin in kernel to be used as FPMCU_RST. BUG=b:128686027 BRANCH=None TEST=Read Pad Configuration Lock (PADCFGLOCK_GPP_A_0) register. localhost /sys/class/gpio # iotools mmio_read32 0xfd6e0080 0x00000000 localhost /sys/class/gpio # echo 212 > export Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32126 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index dc7cc24..984852f 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -73,6 +73,8 @@ register "DdiPortBHpd" = "1" register "DdiPortCHpd" = "1" register "tcc_offset" = "10" # TCC of 90C + # Unlock GPIO pads + register "PchUnlockGpioPads" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1 -- To view, visit https://review.coreboot.org/c/coreboot/+/32126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0439956e6c8e386435e535665ccaf2ab82adeb0 Gerrit-Change-Number: 32126 Gerrit-PatchSet: 3 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan@google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: merged
participants (3)
-
Furquan Shaikh (Code Review) -
Krishna P Bhat D (Code Review) -
Patrick Georgi (Code Review)