Attention is currently required from: Furquan Shaikh, Nick Vaccaro, Patrick Rudolph, Karthik Ramasubramanian.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58352 )
Change subject: soc/intel/alderlake: enable gpio locking
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Patch Set 4: Code-Review+1
(1 comment)
File src/soc/intel/alderlake/gpio.c:
https://review.coreboot.org/c/coreboot/+/58352/comment/7f2c2152_612f3dc0
PS4, Line 278: { GPP_E9, GPIO_LOCK_CONFIG }, /* ISH_GP4 NF2 */
another pad to consider (for a different reason) is GPP_H3. Its NF1 is `SX_EXIT_HOLDOFF#` which, when selected, can be used to delay exiting from Sx states (depending on SLP_A#). This can be misused to prevent a device from exiting S4 or S5 (see the PCH EDS vol 1 for details)
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