Change in coreboot[master]: cpu/intel/haswell/Makefile.inc: Order entries

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44214 )


Change subject: cpu/intel/haswell/Makefile.inc: Order entries
......................................................................

cpu/intel/haswell/Makefile.inc: Order entries

Group lines by stages, then subdirs, then microcode. Within groups,
order in ascending count of `../` in prefix and then alphabetically.

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.

Change-Id: I0f792ccd54c2c77545d5e1e1392b5ee954634314
Signed-off-by: Angel Pons <[e-mail]>
---
M src/cpu/intel/haswell/Makefile.inc
1 file changed, 13 insertions(+), 13 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/44214/1

diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index b93b911..cf4e812 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -1,25 +1,25 @@
-ramstage-y += haswell_init.c
+bootblock-y += bootblock.c
+bootblock-y += ../car/bootblock.c
+bootblock-y += ../car/non-evict/cache_as_ram.S
+bootblock-y += ../../x86/early_reset.S
+
 romstage-y += ../car/romstage.c
 
+postcar-y += ../car/non-evict/exit_car.S
+
 ramstage-y += acpi.c
+ramstage-y += haswell_init.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
 
 smm-y += finalize.c
 
-bootblock-y += ../car/non-evict/cache_as_ram.S
-bootblock-y += ../car/bootblock.c
-bootblock-y += ../../x86/early_reset.S
-bootblock-y += bootblock.c
-
-postcar-y += ../car/non-evict/exit_car.S
-
-subdirs-y += ../../x86/tsc
-subdirs-y += ../../x86/mtrr
-subdirs-y += ../../x86/lapic
-subdirs-y += ../../x86/cache
-subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../turbo
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/smm
+subdirs-y += ../../x86/tsc
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*)
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0f792ccd54c2c77545d5e1e1392b5ee954634314
Gerrit-Change-Number: 44214
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-MessageType: newchange

[Angel Pons (Code Review)]

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44214 )

Change subject: cpu/intel/haswell/Makefile.inc: Order entries
......................................................................


Abandoned

Sorry, I ran out of patience and energy to care about these changes any longer.
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0f792ccd54c2c77545d5e1e1392b5ee954634314
Gerrit-Change-Number: 44214
Gerrit-PatchSet: 2
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-Reviewer: Martin Roth <[e-mail]>
Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Patrick Rudolph <[e-mail]>
Gerrit-Reviewer: build bot (Jenkins) <[e-mail]>
Gerrit-CC: Paul Menzel <[e-mail]>
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