Attention is currently required from: Tarun Tuli, Eran Mitrani.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70166 )
Change subject: soc/intel/common: provide a list of D-states to enter LPM ......................................................................
Patch Set 3:
(7 comments)
File src/soc/intel/alderlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/70166/comment/47c48a8f_95bd7b0a PS3, Line 225: : min_sleep_state_t **get_min_sleep_state_array(int *size) : { : *size = ARRAY_SIZE(min_pci_sleep_states); : return &min_pci_sleep_states; : } nit: you cab avoid having double point (IMO, we don't need)
struct min_sleep_state *get_min_sleep_state_array(size_t *size) { *size = ARRAY_SIZE(min_pci_sleep_states); return min_pci_sleep_states; }
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/70166/comment/1d869216_7d7ec71b PS3, Line 29: #define LPI_REVISION 0 : #define LPI_ENABLED 1 may be enum?
https://review.coreboot.org/c/coreboot/+/70166/comment/6494c5ba_79cfdb5f PS3, Line 440: ** __weak struct min_sleep_state *get_min_sleep_state_array(size_t *size) { *size = 0; return NULL; }
https://review.coreboot.org/c/coreboot/+/70166/comment/ff867832_78d9039d PS3, Line 448: min_sleep_state_t **min_pci_sleep_states; size_t size; struct min_sleep_state *state = get_min_sleep_state_array(&size);
https://review.coreboot.org/c/coreboot/+/70166/comment/7014e527_e190a93c PS3, Line 464: *min_pci_sleep_states)[i].pci_dev state[i].pci_dev
https://review.coreboot.org/c/coreboot/+/70166/comment/3a1d6201_8526bac8 PS3, Line 465: *min_pci_sleep_states)[i] state[i].min_sleep_state
https://review.coreboot.org/c/coreboot/+/70166/comment/263cf287_962c08f3 PS3, Line 537: printk(BIOS_INFO, "Returning SoC specific constraint package for %d devices\n", num_entries); u can drop this