Change in coreboot[master]: mb/intel/jasperlake_rvp: Update data-lanes and I2C address for OV9734

[Sugnan Prabhu S (Code Review)]

Sugnan Prabhu S has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44583 )

Change subject: mb/intel/jasperlake_rvp: Update data-lanes and I2C address for OV9734
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mb/intel/jasperlake_rvp: Update data-lanes and I2C address for OV9734

Signed-off-by: Sugnan Prabhu S 
Change-Id: I5910bcace770fe3dea440f35b56621d59fe7f395
---
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/44583/1

diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index dfe26b7..01dcea2 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -179,7 +179,7 @@
    			register "device_type" = "INTEL_ACPI_CAMERA_CIO2"

register "cio2_num_ports" = "2"
-				register "cio2_lanes_used" = "{2,2}"
+				register "cio2_lanes_used" = "{1,2}"
    			register "cio2_lane_endpoint[0]" = ""^I2C4.CAM0""
    			register "cio2_lane_endpoint[1]" = ""^I2C5.CAM1""
    			register "cio2_prt[0]" = "0"
@@ -354,7 +354,7 @@
    			register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
    			register "off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"

-				device i2c 10 on end
+				device i2c 36 on end
    		end
    	end
    	device pci 19.1 on # I2C #5 Cam 1 and VCM