Ionela Voinescu (ionela.voinescu@imgtec.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12755
-gerrit
commit 77c3c6e10c533baedd948b8fd00576a7ae6a88d8 Author: Ionela Voinescu ionela.voinescu@imgtec.com Date: Thu Dec 17 13:11:50 2015 +0000
soc/imgtec/pistachio: add implementation for system reset
Implement system reset by calling the watchdog soft reset. Following the soft reset, the SoC will reset to the same logic state and therefore have the same effect as a hard (power-on) reset except for: - watchdog scratch registers will be unaffected (hard reset will clear them) - the real time clock will be unaffected
BUG=none TEST=tested on Pistachio bring up board
Change-Id: I1332c2249c756f6d8574fc5c407de52f88e60f08 Signed-off-by: Ionela Voinescu ionela.voinescu@imgtec.com --- src/soc/imgtec/pistachio/reset.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/soc/imgtec/pistachio/reset.c b/src/soc/imgtec/pistachio/reset.c index 7bf4d03..fc581df 100644 --- a/src/soc/imgtec/pistachio/reset.c +++ b/src/soc/imgtec/pistachio/reset.c @@ -13,13 +13,15 @@ * GNU General Public License for more details. */
+#include <arch/io.h> #include <console/console.h> #include <reset.h>
+#define PISTACHIO_WD_ADDR 0xB8102100 +#define PISTACHIO_WD_SW_RST_OFFSET 0x0000 + void hard_reset(void) { - printk(BIOS_EMERG, "reset failed!\n"); - /* TBD */ - for (;;) - ; + /* Generate system reset */ + write32(PISTACHIO_WD_ADDR + PISTACHIO_WD_SW_RST_OFFSET, 0x1); }