[S] Change in coreboot[main]: device/pci_ids: Add Amston Lake CPU IDs

[Harrie Paijmans (Code Review)]

Attention is currently required from: Dinesh Gehlot, Erik van den Bogaert, Frans Hendriks, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik.

Harrie Paijmans has posted comments on this change by Harrie Paijmans. ( https://review.coreboot.org/c/coreboot/+/87243?usp=email )

Change subject: device/pci_ids: Add Amston Lake CPU IDs
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Patch Set 3:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/87243/comment/86af3115_dd9f869e?usp... :
PS2, Line 7: Amstonlake
> Amston Lake

done

https://review.coreboot.org/c/coreboot/+/87243/comment/9f5a95ff_b9914a85?usp... :
PS2, Line 13: Alderlake
> Alder Lake

done

File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/87243/comment/6dfa3d4a_9b1a9683?usp... :
PS2, Line 4430: #define PCI_DID_INTEL_ASL_ID_1			0x4675
              : #define PCI_DID_INTEL_ASL_ID_2			0x4674
              : #define PCI_DID_INTEL_ASL_ID_3			0x4632
> Is the mapping 1 to 0x4675 from the datasheet, or could the smaller number 0x4632 be 1?

The mapping was done in the order of the datasheet.
 I changed the order to be inline with the other ID's in the source.