Change in coreboot[master]: soc/intel/tigerlake: Update Tigerlake SA IDs

[Derek Huang (Code Review)]

Derek Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tigerlake SA IDs
......................................................................

soc/intel/tigerlake: Update Tigerlake SA IDs

This patch update Tigerlake SA DID and report platform.
According to doc #626936:
TGL-UP4(Y) (4+2): 9A12h
TGL-UP4(Y) (2+2): 9A02h

Signed-off-by: derek.huang 
Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 4 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/1

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 4b17567..b8a7308 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3521,9 +3521,9 @@
 #define PCI_DEVICE_ID_INTEL_CML_H_4_2		0x9B64
 #define PCI_DEVICE_ID_INTEL_CML_H_8_2		0x9B44
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U		0x9A14
-#define PCI_DEVICE_ID_INTEL_TGL_ID_U_1		0x9A12
+#define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A12
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
-#define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A10
+#define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2	0x9A02
 #define PCI_DEVICE_ID_INTEL_JSL_EHL		0x4532
 #define PCI_DEVICE_ID_INTEL_EHL_ID_1		0x4510
 #define PCI_DEVICE_ID_INTEL_JSL_ID_1		0x4e22
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index e6bbfc7..b5d892b 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -391,9 +391,9 @@
    PCI_DEVICE_ID_INTEL_CML_H_4_2,
    PCI_DEVICE_ID_INTEL_CML_H_8_2,
    PCI_DEVICE_ID_INTEL_TGL_ID_U,
-	PCI_DEVICE_ID_INTEL_TGL_ID_U_1,
    PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2,
    PCI_DEVICE_ID_INTEL_TGL_ID_Y,
+	PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2,
    PCI_DEVICE_ID_INTEL_JSL_EHL,
    PCI_DEVICE_ID_INTEL_EHL_ID_1,
    PCI_DEVICE_ID_INTEL_JSL_ID_1,
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c
index a64738d..7693856 100644
--- a/src/soc/intel/tigerlake/bootblock/report_platform.c
+++ b/src/soc/intel/tigerlake/bootblock/report_platform.c
@@ -33,9 +33,9 @@
    const char *name;
 } mch_table[] = {
    { PCI_DEVICE_ID_INTEL_TGL_ID_U, "Tigerlake-U-4-2" },
-	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_1, "Tigerlake-U-4-3e" },
    { PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" },
    { PCI_DEVICE_ID_INTEL_TGL_ID_Y, "Tigerlake-Y-4-2" },
+	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" },
    { PCI_DEVICE_ID_INTEL_JSL_EHL, "Jasperlake Elkhartlake" },
    { PCI_DEVICE_ID_INTEL_EHL_ID_1, "Elkhartlake-1" },
 };
diff --git a/src/soc/intel/tigerlake/systemagent.c b/src/soc/intel/tigerlake/systemagent.c
index e428365..c53cb98 100644
--- a/src/soc/intel/tigerlake/systemagent.c
+++ b/src/soc/intel/tigerlake/systemagent.c
@@ -79,7 +79,6 @@
     */
    switch (sa_pci_id) {
    case PCI_DEVICE_ID_INTEL_TGL_ID_U:
-	case PCI_DEVICE_ID_INTEL_TGL_ID_U_1:
    	soc_config = &config->power_limits_config[POWER_LIMITS_U_4_CORE];
    	break;
    case PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2:

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tigerlake SA IDs
......................................................................

Patch Set 1:

(5 comments)

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@2 
PS1, Line 2: derek.huang
Please use *Derek Huang*.

$ git config --global user.name "Derek Huang"
    $ git commit --amend -s --author="Derek Huang "

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@7 
PS1, Line 7: Tigerlake
Tiger Lake

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@9 
PS1, Line 9: Tigerlake
Tiger Lake

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@9 
PS1, Line 9: update
updates

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@13 
PS1, Line 13: 
Please mention that the ID of the one device is changed.

Any idea, why the other IDs were added?

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tigerlake SA IDs
......................................................................

Patch Set 1: Code-Review+2

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tigerlake SA IDs
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@14 
PS1, Line 14: derek.huang 
why not @intel.com account ?

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Sumeet R Pawnikar, Subrata Banik, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#2).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936:
TGL-UP4(Y) (4+2): 9A12h
TGL-UP4(Y) (2+2): 9A02h

Signed-off-by: derek.huang 
Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 4 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/2

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Caveh Jalali (Code Review)]

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 2: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/43061/2/src/include/device/pci_ids.... 
File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/43061/2/src/include/device/pci_ids.... 
PS2, Line 3525: #define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A12
              : #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
could you swap these two lines so that the _Y/_U IDs are grouped?

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 2:

(2 comments)

https://review.coreboot.org/c/coreboot/+/43061/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/2//COMMIT_MSG@12 
PS2, Line 12: 9A02h
I did not find any code change in your CL for 9a02. Are we missing something here ?

https://review.coreboot.org/c/coreboot/+/43061/2/src/include/device/pci_ids.... 
File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/43061/2/src/include/device/pci_ids.... 
PS2, Line 3527: 0x9A10
any reason for removing this 0x9A10 entry which is for Y segment SKU ?

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 2:

(1 comment)

Is there an updated sightings document that lists the most current PCI IDs?

https://review.coreboot.org/c/coreboot/+/43061/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/2//COMMIT_MSG@14 
PS2, Line 14: Signed-off-by: derek.huang 
remove extra signed-off-by tag

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#3).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936:
TGL-UP4(Y) (4+2): 9A12h
TGL-UP4(Y) (2+2): 9A02h

Signed-off-by: derek.huang 
Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 4 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/3

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#4).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936:
TGL-UP4(Y) (4+2): 9A12h
TGL-UP4(Y) (2+2): 9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 4 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/4

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43061/4/src/soc/intel/tigerlake/boo... 
File src/soc/intel/tigerlake/bootblock/report_platform.c:

https://review.coreboot.org/c/coreboot/+/43061/4/src/soc/intel/tigerlake/boo... 
PS4, Line 36: Tigerlake-U-4-3e
any reason for removing this ?

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#5).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936 and doc #630389:
TGL-UP4(Y) (4+2): Change PCI_DEVICE_ID_INTEL_TGL_ID_Y to 0x9A12h
TGL-UP4(Y) (2+2): Add PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 4 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/5

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 5:

(2 comments)

https://review.coreboot.org/c/coreboot/+/43061/5/src/soc/intel/tigerlake/boo... 
File src/soc/intel/tigerlake/bootblock/report_platform.c:

https://review.coreboot.org/c/coreboot/+/43061/5/src/soc/intel/tigerlake/boo... 
PS5, Line 35: PCI_DEVICE_ID_INTEL_TGL_ID_U
Would you mind to append this *_4_2 to match with name string. Also, it will be align with below *_2_2
This will give better code readability and quick reference as well.

https://review.coreboot.org/c/coreboot/+/43061/5/src/soc/intel/tigerlake/boo... 
PS5, Line 37: PCI_DEVICE_ID_INTEL_TGL_ID_Y
same comment as above.

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#6).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936 and doc #630389:
TGL-UP4(Y) (4+2): Change PCI_DEVICE_ID_INTEL_TGL_ID_Y to 0x9A12h
TGL-UP4(Y) (2+2): Add PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 7 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/6

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#7).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936 and doc #630389:
TGL-UP4(Y) (4+2): Change PCI_DEVICE_ID_INTEL_TGL_ID_Y to 0x9A12h
TGL-UP4(Y) (2+2): Add PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 10 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/7

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#8).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936 and doc #630389:
TGL-UP4(Y) (4+2): Change PCI_DEVICE_ID_INTEL_TGL_ID_Y to 0x9A12h
TGL-UP4(Y) (2+2): Add PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 10 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/8

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Caveh Jalali (Code Review)]

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 8: Code-Review+1

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43061/8//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/8//COMMIT_MSG@11 
PS8, Line 11: TGL-UP4(Y) (4+2): Change PCI_DEVICE_ID_INTEL_TGL_ID_Y to 0x9A12h
Append this accordingly *_Y_4_2 as per code changes.

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#9).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform.
According to doc #626936 and doc #630389, update below definitions
of SA ID for TGL-UP4 skus:
TGL-UP4(Y) (4+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2 0x9A12h
TGL-UP4(Y) (2+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 10 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/9

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 9: Code-Review+2

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 10:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43061/8//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/8//COMMIT_MSG@11 
PS8, Line 11: TGL-UP4(Y) (4+2): Change PCI_DEVICE_ID_INTEL_TGL_ID_Y to 0x9A12h
> Append this accordingly *_Y_4_2 as per code changes.

Done

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 10:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43061/10//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/10//COMMIT_MSG@10 
PS10, Line 10: #626936 and doc #630389
I am unable to find these docs anywhere even on RDC, but if UP4 is the -Y and UP3 is -U, then it agrees with #613584

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 10:

(3 comments)

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@13 
PS1, Line 13:
> Please mention that the ID of the one device is changed. […]

Please also mention the removed IDs.

https://review.coreboot.org/c/coreboot/+/43061/10/src/include/device/pci_ids... 
File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/43061/10/src/include/device/pci_ids... 
PS10, Line 3525: #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
Please order 4_2 after 2_2.

https://review.coreboot.org/c/coreboot/+/43061/10/src/include/device/pci_ids... 
PS10, Line 3527: #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2	0x9A02
Ditto.

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#11).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform. According to
doc #613584, remove PCI_DEVICE_ID_INTEL_TGL_ID_U_1 and add below
definitions of SA ID for TGL-UP4 skus:
TGL-UP4(Y) (4+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2 0x9A12h
TGL-UP4(Y) (2+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 10 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/11

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Caveh Jalali (Code Review)]

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 12:

(3 comments)

https://review.coreboot.org/c/coreboot/+/43061/12/src/include/device/pci_ids... 
File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/43061/12/src/include/device/pci_ids... 
PS12, Line 3524: #define PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2	0x9A14
               : #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
               : #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2	0x9A12
               : #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2	0x9A02
might as well apply _2_4 before _4_4 ordering here as well for consistency.

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/bo... 
File src/soc/intel/tigerlake/bootblock/report_platform.c:

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/bo... 
PS12, Line 35: 	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" },
             : 	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" },
             : 	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" },
             : 	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" },
also reorder -2-2 before -4-2 here.

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/sy... 
File src/soc/intel/tigerlake/systemagent.c:

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/sy... 
PS12, Line 81: case PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2:
             : 		soc_config = &config->power_limits_config[POWER_LIMITS_U_4_CORE];
             : 		break;
             : 	case PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2:
             : 		soc_config = &config->power_limits_config[POWER_LIMITS_U_2_CORE];
             : 		break;
_2_2 before _4_2 here as well.

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Sumeet R Pawnikar, Subrata Banik, Nick Vaccaro, Kane Chen, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43061

to look at the new patch set (#13).

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform. According to
doc #613584, remove PCI_DEVICE_ID_INTEL_TGL_ID_U_1 and add below
definitions of SA ID for TGL-UP4 skus:
TGL-UP4(Y) (4+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2 0x9A12h
TGL-UP4(Y) (2+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 12 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43061/13

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Caveh Jalali (Code Review)]

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 13: Code-Review+2

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Derek Huang (Code Review)]

Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 13:

(20 comments)
> Patch Set 2:
>
> (1 comment)
>
> Is there an updated sightings document that lists the most current PCI IDs?

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@2 
PS1, Line 2: derek.huang
> Please use *Derek Huang*. […]

Done

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@7 
PS1, Line 7: Tigerlake
> Tiger Lake

Done

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@9 
PS1, Line 9: update
> updates

Done

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@9 
PS1, Line 9: Tigerlake
> Tiger Lake

Done

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@13 
PS1, Line 13:
> Please mention that the ID of the one device is changed. […]

Done

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@14 
PS1, Line 14: derek.huang
> why not @intel. […]

Ack

https://review.coreboot.org/c/coreboot/+/43061/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/2//COMMIT_MSG@12 
PS2, Line 12: 9A02h
> I did not find any code change in your CL for 9a02. […]

Done

https://review.coreboot.org/c/coreboot/+/43061/2//COMMIT_MSG@14 
PS2, Line 14: Signed-off-by: derek.huang
> remove extra signed-off-by tag

Done

https://review.coreboot.org/c/coreboot/+/43061/8//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/8//COMMIT_MSG@11 
PS8, Line 11: TGL-UP4(Y) (4+2): Change PCI_DEVICE_ID_INTEL_TGL_ID_Y to 0x9A12h
> Append this accordingly *_Y_4_2 as per code changes.

Done

https://review.coreboot.org/c/coreboot/+/43061/10//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/10//COMMIT_MSG@10 
PS10, Line 10: #626936 and doc #630389
> I am unable to find these docs anywhere even on RDC, but if UP4 is the -Y and UP3 is -U, then it agr […]

Done

https://review.coreboot.org/c/coreboot/+/43061/12/src/include/device/pci_ids... 
File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/43061/12/src/include/device/pci_ids... 
PS12, Line 3524: #define PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2	0x9A14
               : #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
               : #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2	0x9A12
               : #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2	0x9A02
> might as well apply _2_4 before _4_4 ordering here as well for consistency.

Done. I guess you mean _2_2 before _4_2

https://review.coreboot.org/c/coreboot/+/43061/10/src/include/device/pci_ids... 
File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/43061/10/src/include/device/pci_ids... 
PS10, Line 3525: #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
> Please order 4_2 after 2_2.

Done

https://review.coreboot.org/c/coreboot/+/43061/10/src/include/device/pci_ids... 
PS10, Line 3527: #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2	0x9A02
> Ditto.

Done

https://review.coreboot.org/c/coreboot/+/43061/2/src/include/device/pci_ids.... 
File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/43061/2/src/include/device/pci_ids.... 
PS2, Line 3527: 0x9A10
> any reason for removing this 0x9A10 entry which is for Y segment SKU ?

Done

https://review.coreboot.org/c/coreboot/+/43061/2/src/include/device/pci_ids.... 
PS2, Line 3525: #define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A12
              : #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
> could you swap these two lines so that the _Y/_U IDs are grouped?

Done

https://review.coreboot.org/c/coreboot/+/43061/4/src/soc/intel/tigerlake/boo... 
File src/soc/intel/tigerlake/bootblock/report_platform.c:

https://review.coreboot.org/c/coreboot/+/43061/4/src/soc/intel/tigerlake/boo... 
PS4, Line 36: Tigerlake-U-4-3e
> any reason for removing this ?

Please check the changes in src/include/device/pci_ids.h
in the old code, PCI_DEVICE_ID_INTEL_TGL_ID_U_1 is defined as 0x9A12, but 0x9A12 is the ID for TGL-Y(4+2). So PCI_DEVICE_ID_INTEL_TGL_ID_U_1 is replaced by PCI_DEVICE_ID_INTEL_TGL_ID_Y

https://review.coreboot.org/c/coreboot/+/43061/5/src/soc/intel/tigerlake/boo... 
File src/soc/intel/tigerlake/bootblock/report_platform.c:

https://review.coreboot.org/c/coreboot/+/43061/5/src/soc/intel/tigerlake/boo... 
PS5, Line 35: PCI_DEVICE_ID_INTEL_TGL_ID_U
> Would you mind to append this *_4_2 to match with name string. […]

Done

https://review.coreboot.org/c/coreboot/+/43061/5/src/soc/intel/tigerlake/boo... 
PS5, Line 37: PCI_DEVICE_ID_INTEL_TGL_ID_Y
> same comment as above.

Done

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/bo... 
File src/soc/intel/tigerlake/bootblock/report_platform.c:

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/bo... 
PS12, Line 35: 	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" },
             : 	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" },
             : 	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" },
             : 	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" },
> also reorder -2-2 before -4-2 here.

Done

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/sy... 
File src/soc/intel/tigerlake/systemagent.c:

https://review.coreboot.org/c/coreboot/+/43061/12/src/soc/intel/tigerlake/sy... 
PS12, Line 81: case PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2:
             : 		soc_config = &config->power_limits_config[POWER_LIMITS_U_4_CORE];
             : 		break;
             : 	case PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2:
             : 		soc_config = &config->power_limits_config[POWER_LIMITS_U_2_CORE];
             : 		break;
> _2_2 before _4_2 here as well.

Done

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 13:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43061/1//COMMIT_MSG@14 
PS1, Line 14: derek.huang
> Ack

u r still using corp account :) not @intel.com directly

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 14: Code-Review+2

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

Patch Set 14: Code-Review+2

Change in coreboot[master]: soc/intel/tigerlake: Update Tiger Lake SA IDs

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43061 )

Change subject: soc/intel/tigerlake: Update Tiger Lake SA IDs
......................................................................

soc/intel/tigerlake: Update Tiger Lake SA IDs

This patch updates Tiger Lake SA DID and report platform. According to
doc #613584, remove PCI_DEVICE_ID_INTEL_TGL_ID_U_1 and add below
definitions of SA ID for TGL-UP4 skus:
TGL-UP4(Y) (4+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2 0x9A12h
TGL-UP4(Y) (2+2): PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02h

Change-Id: Id9d9c9ac3bf39582b0da610e6ef912031939c763
Signed-off-by: Derek Huang 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43061
Reviewed-by: Sumeet R Pawnikar 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Caveh Jalali 
Tested-by: build bot (Jenkins) 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/systemagent.c
4 files changed, 12 insertions(+), 13 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Sumeet R Pawnikar: Looks good to me, approved
  Caveh Jalali: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 62220d8..94ad02f 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3521,10 +3521,10 @@
 #define PCI_DEVICE_ID_INTEL_CML_H		0x9B54
 #define PCI_DEVICE_ID_INTEL_CML_H_4_2		0x9B64
 #define PCI_DEVICE_ID_INTEL_CML_H_8_2		0x9B44
-#define PCI_DEVICE_ID_INTEL_TGL_ID_U		0x9A14
-#define PCI_DEVICE_ID_INTEL_TGL_ID_U_1		0x9A12
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
-#define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A10
+#define PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2	0x9A14
+#define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2	0x9A02
+#define PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2	0x9A12
 #define PCI_DEVICE_ID_INTEL_JSL_EHL		0x4532
 #define PCI_DEVICE_ID_INTEL_EHL_ID_1		0x4510
 #define PCI_DEVICE_ID_INTEL_JSL_ID_1		0x4e22
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index e6bbfc7..72d611a 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -390,10 +390,10 @@
    PCI_DEVICE_ID_INTEL_CML_H,
    PCI_DEVICE_ID_INTEL_CML_H_4_2,
    PCI_DEVICE_ID_INTEL_CML_H_8_2,
-	PCI_DEVICE_ID_INTEL_TGL_ID_U,
-	PCI_DEVICE_ID_INTEL_TGL_ID_U_1,
    PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2,
-	PCI_DEVICE_ID_INTEL_TGL_ID_Y,
+	PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2,
+	PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2,
+	PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2,
    PCI_DEVICE_ID_INTEL_JSL_EHL,
    PCI_DEVICE_ID_INTEL_EHL_ID_1,
    PCI_DEVICE_ID_INTEL_JSL_ID_1,
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c
index 55a9790..6acc0c3 100644
--- a/src/soc/intel/tigerlake/bootblock/report_platform.c
+++ b/src/soc/intel/tigerlake/bootblock/report_platform.c
@@ -32,10 +32,10 @@
    u16 mchid;
    const char *name;
 } mch_table[] = {
-	{ PCI_DEVICE_ID_INTEL_TGL_ID_U, "Tigerlake-U-4-2" },
-	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_1, "Tigerlake-U-4-3e" },
    { PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" },
-	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y, "Tigerlake-Y-4-2" },
+	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" },
+	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" },
+	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" },
 };

static struct {
diff --git a/src/soc/intel/tigerlake/systemagent.c b/src/soc/intel/tigerlake/systemagent.c
index e428365..fd611bb 100644
--- a/src/soc/intel/tigerlake/systemagent.c
+++ b/src/soc/intel/tigerlake/systemagent.c
@@ -78,13 +78,12 @@
     * differentiated here based on SA PCI ID.
     */
    switch (sa_pci_id) {
-	case PCI_DEVICE_ID_INTEL_TGL_ID_U:
-	case PCI_DEVICE_ID_INTEL_TGL_ID_U_1:
-		soc_config = &config->power_limits_config[POWER_LIMITS_U_4_CORE];
-		break;
    case PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2:
    	soc_config = &config->power_limits_config[POWER_LIMITS_U_2_CORE];
    	break;
+	case PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2:
+		soc_config = &config->power_limits_config[POWER_LIMITS_U_4_CORE];
+		break;
    default:
    	printk(BIOS_ERR, "TGL: unknown SA ID: 0x%4x, skipping power limits "
    	       "configuration\n", sa_pci_id);