Change in coreboot[master]: nb/intel/x4x/rcven.c: Fix programming coarse offset

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/22816

Change subject: nb/intel/x4x/rcven.c: Fix programming coarse offset
......................................................................

nb/intel/x4x/rcven.c: Fix programming coarse offset

This fixes some bitwise logic errors that caused the coarse offset not
to be programmed.

Change-Id: I41869815f782a2ea1178bdea006e3a7587441323
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/x4x/rcven.c
1 file changed, 3 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/22816/1

diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c
index 23f8d52..cc45aa9 100644
--- a/src/northbridge/intel/x4x/rcven.c
+++ b/src/northbridge/intel/x4x/rcven.c
@@ -365,8 +365,9 @@
    			"medium: %d; tap: %d\n",
    			channel, lane, reg8, timing[lane].medium,
    			timing[lane].tap);
-			MCHBAR16(0x400 * channel + 0x5fa) &=
-				~(3 << (lane * 2)) | (reg8 << (lane * 2));
+			MCHBAR16(0x400 * channel + 0x5fa) =
+				(MCHBAR16(0x400 * channel + 0x5fa) &
+				~(3 << (lane * 2))) | (reg8 << (lane * 2));
    	}
    	/* simply use timing[0] to program mincoarse */
    	timing[0].coarse = mincoarse;