Naresh Solanki (naresh.solanki@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18234
-gerrit
commit e38e6d13f6f39545eb236ec17060ed3e057adcca Author: Naresh G Solanki naresh.solanki@intel.com Date: Wed Jan 25 22:42:24 2017 +0530
soc/intel/skylake: Add include path for FSP UPD
FSP binary comes along with FSP UPD header. The header file present in src/vendorcode/intel/fsp/fsp2_0/skykabylake may be not in sync with currently used fsp binary. Hence add include path for FSP UPD header to 3rdparty/blobs/mainboard/$(MAINBOARD)/fsp/ to be considered during build.
Change-Id: Iaeae6a845e57a285a0737b0dff7c95bf20f56b12 Signed-off-by: Naresh G Solanki naresh.solanki@intel.com --- src/soc/intel/skylake/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 4b6fcfc..743a4f3 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -109,6 +109,8 @@ smm-$(CONFIG_UART_DEBUG) += uart_debug.c CPPFLAGS_common += -I$(src)/soc/intel/skylake CPPFLAGS_common += -I$(src)/soc/intel/skylake/include
+CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARD)/fsp/ + ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y) CPPFLAGS_common += -I$(src)/soc/intel/skylake/include/fsp11 CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/skylake
-
Naresh Solanki