Patch set updated for coreboot: [NEEDS TESTING] lenovo/T400: correct GPIO for hybrid driver
Arthur Heymans (arthur@aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16354
-gerrit
commit aa742b3e918784f83e9871625138e5660bdf67e5 Author: Arthur Heymans arthur@aheymans.xyz Date: Tue Aug 30 13:42:33 2016 +0200
[NEEDS TESTING] lenovo/T400: correct GPIO for hybrid driver
Currently the hybrid driver uses GPIO 52 to configure mux. This is not the right GPIO on the T400 according to the schematics "MALIBU-3 EXT". It should be GPIO22.
The polarities on the gpio's are also set differently on Lenovo T400. On the Lenovo T400 HIGH on GPIO22 means enable.
Previously also gpio 49 (GFX_PWR_EN) and 19 (BKLT_CTRL_SEL), were configured for hybrid graphics to work on T400, but this was reverted in 14d1a93e: "Revert mainboard/lenovo/t400: Add initial hybrid graphics support". This patch sets those gpios correctly again for the Lenovo T400.
This also adds a IDG disable op, since it is used here to uncleam the VGA from the IGD.
Change-Id: I3167303abeb6b3711d53508c61a340d03b1e050a Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- src/drivers/lenovo/Kconfig | 8 -------- src/drivers/lenovo/hybrid_graphics.c | 22 ++++++++++++++++++++-- src/mainboard/lenovo/t400/devicetree.cb | 7 +++++++ src/mainboard/lenovo/t400/romstage.c | 2 +- src/mainboard/lenovo/t420s/devicetree.cb | 5 +++++ src/mainboard/lenovo/t520/devicetree.cb | 5 +++++ src/mainboard/lenovo/t530/devicetree.cb | 5 +++++ src/northbridge/intel/gm45/gma.c | 13 +++++++++++++ 8 files changed, 56 insertions(+), 11 deletions(-)
diff --git a/src/drivers/lenovo/Kconfig b/src/drivers/lenovo/Kconfig index 38b86da..fe1ea6e 100644 --- a/src/drivers/lenovo/Kconfig +++ b/src/drivers/lenovo/Kconfig @@ -31,11 +31,3 @@ endif config DRIVERS_LENOVO_HYBRID_GRAPHICS bool default n - -config HYBRID_GRAPHICS_GPIO_NUM - depends on DRIVERS_LENOVO_HYBRID_GRAPHICS - int - default 52 - help - Set a default GPIO that sets the panel LVDS signal routing to - integrated or discrete GPU. diff --git a/src/drivers/lenovo/hybrid_graphics.c b/src/drivers/lenovo/hybrid_graphics.c index 9b46646..33958c2 100644 --- a/src/drivers/lenovo/hybrid_graphics.c +++ b/src/drivers/lenovo/hybrid_graphics.c @@ -24,6 +24,7 @@ #include <device/pci.h> #include <console/console.h> #include <southbridge/intel/common/gpio.h> +#include "chip.h"
/* Hybrid graphics allows to connect LVDS interface to either iGPU * or dGPU depending on GPIO level. @@ -42,10 +43,19 @@
static void hybrid_graphics_disable_peg(struct device *dev) { + struct drivers_lenovo_config *config = dev->chip_info; struct device *peg_dev; + u8 disable_lvl = config->discrete_is_high ? + GPIO_LEVEL_LOW : GPIO_LEVEL_HIGH;
/* connect LVDS interface to iGPU */ - set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, GPIO_LEVEL_HIGH); + if (config->hybrid_gpio) + set_gpio(config->hybrid_gpio, disable_lvl); + if (config->bcl_ctl_gpio) + set_gpio(config->bcl_ctl_gpio, disable_lvl); + if (config->gfx_pwr_gpio) + set_gpio(config->gfx_pwr_gpio, disable_lvl); + printk(BIOS_DEBUG, "Hybrid graphics: Switching panel to integrated GPU.\n"); dev->enabled = 0;
@@ -61,14 +71,22 @@ static void hybrid_graphics_disable_peg(struct device *dev) * is present. Enable/disable VGA devices here. */ static void hybrid_graphics_enable_peg(struct device *dev) { + struct drivers_lenovo_config *config = dev->chip_info; u8 hybrid_graphics_mode; + u8 enable_lvl = config->discrete_is_high ? + GPIO_LEVEL_HIGH : GPIO_LEVEL_LOW;
hybrid_graphics_mode = HYBRID_GRAPHICS_INTEGRATED; get_option(&hybrid_graphics_mode, "hybrid_graphics_mode");
if (hybrid_graphics_mode == HYBRID_GRAPHICS_DISCRETE) { /* connect LVDS interface to dGPU */ - set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, GPIO_LEVEL_LOW); + if(config->hybrid_gpio) + set_gpio(config->hybrid_gpio, enable_lvl); + if (config->bcl_ctl_gpio) + set_gpio(config->bcl_ctl_gpio, enable_lvl); + if (config->gfx_pwr_gpio) + set_gpio(config->gfx_pwr_gpio, enable_lvl); printk(BIOS_DEBUG, "Hybrid graphics: Switching panel to discrete GPU.\n"); dev->enabled = 1;
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 9940bb7..9ae08fc 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -42,6 +42,13 @@ chip northbridge/intel/gm45 device pci 03.1 off end # ME device pci 03.2 off end # ME device pci 03.3 off end # ME + + chip drivers/lenovo + register hybrid_gpio = "22" + register discrete_is_high = "1" + register bcl_ctl_gpio = "19" + register gfx_pwr_gpio = "49" + end chip southbridge/intel/i82801ix register "pirqa_routing" = "0x0b" register "pirqb_routing" = "0x0b" diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c index bba53d1..7307f8f 100644 --- a/src/mainboard/lenovo/t400/romstage.c +++ b/src/mainboard/lenovo/t400/romstage.c @@ -101,7 +101,7 @@ void mainboard_romstage_entry(unsigned long bist) sysinfo.spd_map[0] = 0x50; sysinfo.spd_map[2] = 0x51; sysinfo.enable_igd = 1; - sysinfo.enable_peg = 0; + sysinfo.enable_peg = 1; get_gmch_info(&sysinfo); raminit(&sysinfo, s3resume);
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index 24f9ebd..fc0f47c 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -49,6 +49,11 @@ chip northbridge/intel/sandybridge subsystemid 0x17aa 0x21d3 end # Integrated Graphics Controller
+ chip drivers/lenovo + register hybrid_gpio = "52" + register discrete_is_high = "0" + end + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing # 0 No effect (default) diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 6c638e5..b12d60a 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -46,6 +46,11 @@ chip northbridge/intel/sandybridge device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M] device pci 02.0 on end # vga controller
+ chip drivers/lenovo + register hybrid_gpio = "52" + register discrete_is_high = "0" + end + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing # 0 No effect (default) diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb index 0731251..035e225 100644 --- a/src/mainboard/lenovo/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/devicetree.cb @@ -46,6 +46,11 @@ chip northbridge/intel/sandybridge device pci 01.0 on end # PCIe Bridge for discrete graphics device pci 02.0 on end # vga controller
+ chip drivers/lenovo + register hybrid_gpio = "52" + register discrete_is_high = "0" + end + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing # 0 No effect (default) diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 8938197..a42a7e3 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -736,6 +736,18 @@ static struct pci_operations gma_pci_ops = { .set_subsystem = gma_set_subsystem, };
+static void gma_func0_disable(struct device *dev) +{ + u16 reg16; + device_t dev_host = dev_find_slot(0, PCI_DEVFN(0, 0)); + + reg16 = pci_read_config16(dev_host, D0F0_GGC); + reg16 |= (1 << 1); /* disable VGA decode */ + pci_write_config16(dev_host, D0F0_GGC, reg16); + + dev->enabled = 0; +} + static struct device_operations gma_func0_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, @@ -744,6 +756,7 @@ static struct device_operations gma_func0_ops = { .init = gma_func0_init, .scan_bus = 0, .enable = 0, + .disable = gma_func0_disable, .ops_pci = &gma_pci_ops, };
-
Arthur Heymans