Divya S Sasidharan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37867 )
Change subject: src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM) ......................................................................
Patch Set 7:
(4 comments)
Patch Set 5:
There is some overlap in the host commands being added here and the support in https://review.coreboot.org/c/coreboot/+/38539/ and https://review.coreboot.org/c/coreboot/+/38540/. Shaunak, can you please ensure you sync up with Tim. I think there is potential to align the changes better.
Sure, will rebase with the upcoming patch from Tim.
https://review.coreboot.org/c/coreboot/+/37867/5/src/ec/google/chromeec/ec.c File src/ec/google/chromeec/ec.c:
https://review.coreboot.org/c/coreboot/+/37867/5/src/ec/google/chromeec/ec.c... PS5, Line 1432: #define PD_CC_DFP_ATTACHED 5 : #define PD_CC_DEBUG_ACC 6
refer […]
Done
https://review.coreboot.org/c/coreboot/+/37867/5/src/ec/google/chromeec/ec.c... PS5, Line 1442: 0
USB_PD_CTRL_ROLE_NO_CHANGE […]
Done
https://review.coreboot.org/c/coreboot/+/37867/5/src/ec/google/chromeec/ec.c... PS5, Line 1467: int8_t google_chromeec_pd_get_port_info(int port)
make it consistent, ret with error if true fill the data
Done
https://review.coreboot.org/c/coreboot/+/37867/5/src/ec/google/chromeec/ec_c... File src/ec/google/chromeec/ec_commands.h:
https://review.coreboot.org/c/coreboot/+/37867/5/src/ec/google/chromeec/ec_c... PS5, Line 5249: struct ec_response_usb_pd_control_v2 { : uint8_t enabled; : uint8_t role; : uint8_t polarity; : char state[32]; : uint8_t cc_state; /* enum pd_cc_states representing cc state */ : uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ : uint8_t cable_type; /* USBC_CABLE_TYPE_*cable_type */ : uint8_t control_flags; /* USB_PD_MUX_*flags */ : uint8_t cable_speed; : uint8_t cable_gen; /* rounded_support */ : } __ec_align1;
please change it as per this CL […]
Done
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Divya S Sasidharan (Code Review)