Patch merged into coreboot/master: imgtec/pistachio: DDR2, DDR3: DQS gate early

the following patch was just integrated into master:
commit 6b95406ff3d44679d2e0139236c134655b12b927
Author: Ionela Voinescu 
Date:   Thu May 21 13:29:45 2015 +0100

imgtec/pistachio: DDR2, DDR3: DQS gate early

Switching on DQS Gate Early and DQS Gate Extension with
    500R DQS/DSQN Resistors. This setup was recommended by
    Synopsys.

Tested on Pistachio bring up board; DDR2 and DDR3 are
    initialized properly.

Change-Id: I6cd3888d506effe71f5d535367525af2e51f6ba3
    Signed-off-by: Ionela Voinescu 
    Reviewed-on: https://review.coreboot.org/12763
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer

See https://review.coreboot.org/12763 for details.

-gerrit