Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Ravishankar Sarawadi, Tim Wawrzynczak, Bernardo Perez Priego, Usha P, Patrick Rudolph.
Hello Bora Guvendik, build bot (Jenkins), Furquan Shaikh, Selma Bensaid, Ravishankar Sarawadi, Tim Wawrzynczak, Subrata Banik, Usha P, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56612
to look at the new patch set (#4).
Change subject: soc/intel/alderlake: Switch to use common block memory info API
......................................................................
soc/intel/alderlake: Switch to use common block memory info API
API to store memory information has been implemented in intel common block,
this can be utilized by alderlake SOC.
Signed-off-by: Bernardo Perez Priego bernardo.perez.priego@intel.com
Change-Id: I9c65119629d6890ce079fcdd38644545a2731d66
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/romstage/romstage.c
2 files changed, 4 insertions(+), 98 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/56612/4
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I9c65119629d6890ce079fcdd38644545a2731d66
Gerrit-Change-Number: 56612
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