Change in coreboot[master]: arch/x86/acpi_device: Add macros to define gpio interrupt with wake
Alex Levin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38445 )
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
arch/x86/acpi_device: Add macros to define gpio interrupt with wake
Add Provides ACPI_GPIO_IRQ_LEVEL_[LOW|HIGH]_WAKE versions to allow board to define a gpio irq as wake capable.
Change-Id: I42f5084c5f0f5da0a4b39df77707b2f158bcc03d Signed-off-by: Alex Levin levinale@chromium.org --- M src/arch/x86/include/arch/acpi_device.h 1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/38445/1
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h index 0a702c9..f88f3dd 100644 --- a/src/arch/x86/include/arch/acpi_device.h +++ b/src/arch/x86/include/arch/acpi_device.h @@ -303,6 +303,26 @@ .pin_count = 1, \ .pins = { (gpio) } }
+/* Level Triggered Active High GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_HIGH, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Level Triggered Active Low GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_LOW, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + /* Write GpioIo() or GpioInt() descriptor to SSDT AML output */ void acpi_device_write_gpio(const struct acpi_gpio *gpio);
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38445 )
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
Patch Set 1:
(14 comments)
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... File src/arch/x86/include/arch/acpi_device.h:
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 308: .type = ACPI_GPIO_TYPE_INTERRUPT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 309: .pull = ACPI_GPIO_PULL_DEFAULT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 310: .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 311: .irq.polarity = ACPI_IRQ_ACTIVE_HIGH, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 312: .irq.wake = ACPI_IRQ_WAKE, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 313: .pin_count = 1, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 314: .pins = { (gpio) } } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 318: .type = ACPI_GPIO_TYPE_INTERRUPT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 319: .pull = ACPI_GPIO_PULL_DEFAULT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 320: .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 321: .irq.polarity = ACPI_IRQ_ACTIVE_LOW, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 322: .irq.wake = ACPI_IRQ_WAKE, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 323: .pin_count = 1, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 324: .pins = { (gpio) } } please, no spaces at the start of a line
Hello Alex Levin, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38445
to look at the new patch set (#2).
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
arch/x86/acpi_device: Add macros to define gpio interrupt with wake
Add Provides ACPI_GPIO_IRQ_LEVEL_[LOW|HIGH]_WAKE versions to allow board to define a gpio irq as wake capable.
Change-Id: I42f5084c5f0f5da0a4b39df77707b2f158bcc03d Signed-off-by: Alex Levin levinale@chromium.org --- M src/arch/x86/include/arch/acpi_device.h 1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/38445/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38445 )
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
Patch Set 2:
(14 comments)
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... File src/arch/x86/include/arch/acpi_device.h:
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 308: .type = ACPI_GPIO_TYPE_INTERRUPT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 309: .pull = ACPI_GPIO_PULL_DEFAULT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 310: .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 311: .irq.polarity = ACPI_IRQ_ACTIVE_HIGH, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 312: .irq.wake = ACPI_IRQ_WAKE, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 313: .pin_count = 1, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 314: .pins = { (gpio) } } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 318: .type = ACPI_GPIO_TYPE_INTERRUPT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 319: .pull = ACPI_GPIO_PULL_DEFAULT, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 320: .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 321: .irq.polarity = ACPI_IRQ_ACTIVE_LOW, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 322: .irq.wake = ACPI_IRQ_WAKE, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 323: .pin_count = 1, \ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38445/2/src/arch/x86/include/arch/a... PS2, Line 324: .pins = { (gpio) } } please, no spaces at the start of a line
Alex Levin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38445 )
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
Patch Set 2:
(14 comments)
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... File src/arch/x86/include/arch/acpi_device.h:
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 308: .type = ACPI_GPIO_TYPE_INTERRUPT, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 309: .pull = ACPI_GPIO_PULL_DEFAULT, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 310: .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 311: .irq.polarity = ACPI_IRQ_ACTIVE_HIGH, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 312: .irq.wake = ACPI_IRQ_WAKE, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 313: .pin_count = 1, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 314: .pins = { (gpio) } }
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 318: .type = ACPI_GPIO_TYPE_INTERRUPT, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 319: .pull = ACPI_GPIO_PULL_DEFAULT, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 320: .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 321: .irq.polarity = ACPI_IRQ_ACTIVE_LOW, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 322: .irq.wake = ACPI_IRQ_WAKE, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 323: .pin_count = 1, \
please, no spaces at the start of a line
Ack
https://review.coreboot.org/c/coreboot/+/38445/1/src/arch/x86/include/arch/a... PS1, Line 324: .pins = { (gpio) } }
please, no spaces at the start of a line
Ack
Hello Alex Levin, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38445
to look at the new patch set (#3).
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
arch/x86/acpi_device: Add macros to define gpio interrupt with wake
Add Provides ACPI_GPIO_IRQ_LEVEL_[LOW|HIGH]_WAKE versions to allow board to define a gpio irq as wake capable.
Change-Id: I42f5084c5f0f5da0a4b39df77707b2f158bcc03d Signed-off-by: Alex Levin levinale@chromium.org --- M src/arch/x86/include/arch/acpi_device.h 1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/38445/3
Hello Alex Levin, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38445
to look at the new patch set (#4).
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
arch/x86/acpi_device: Add macros to define gpio interrupt with wake
Add Provides ACPI_GPIO_IRQ_LEVEL_[LOW|HIGH]_WAKE versions to allow board to define a gpio irq as wake capable.
Change-Id: I42f5084c5f0f5da0a4b39df77707b2f158bcc03d Signed-off-by: Alex Levin levinale@chromium.org --- M src/arch/x86/include/arch/acpi_device.h 1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/38445/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38445 )
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
Patch Set 4: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38445 )
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
arch/x86/acpi_device: Add macros to define gpio interrupt with wake
Add Provides ACPI_GPIO_IRQ_LEVEL_[LOW|HIGH]_WAKE versions to allow board to define a gpio irq as wake capable.
Change-Id: I42f5084c5f0f5da0a4b39df77707b2f158bcc03d Signed-off-by: Alex Levin levinale@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/38445 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/arch/x86/include/arch/acpi_device.h 1 file changed, 20 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h index 0a702c9..90af81b 100644 --- a/src/arch/x86/include/arch/acpi_device.h +++ b/src/arch/x86/include/arch/acpi_device.h @@ -303,6 +303,26 @@ .pin_count = 1, \ .pins = { (gpio) } }
+/* Level Triggered Active High GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_LEVEL_HIGH_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_HIGH, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Level Triggered Active Low GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_LOW, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + /* Write GpioIo() or GpioInt() descriptor to SSDT AML output */ void acpi_device_write_gpio(const struct acpi_gpio *gpio);
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38445 )
Change subject: arch/x86/acpi_device: Add macros to define gpio interrupt with wake ......................................................................
Patch Set 5:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/248 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/247 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/246
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Alex Levin (Code Review)
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build bot (Jenkins) (Code Review)
-
Furquan Shaikh (Code Review)