Patch set updated for coreboot: nb/intel/x4x: Add support for second PEG slot

[Arthur Heymans]

Arthur Heymans ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18516

-gerrit

commit 68d1e7bbc9fc09569a5d2b456d5c61e525212cac
Author: Arthur Heymans 
Date:   Mon Feb 27 21:45:07 2017 +0100

nb/intel/x4x: Add support for second PEG slot

Is only present on the P45 subtype of chipset.

Change-Id: I6b138db6654c83c40b5ca4b65d6ccd51ad4277fa
    Signed-off-by: Arthur Heymans 
---
 src/northbridge/intel/x4x/northbridge.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 1d6c8ff..9e9f44e 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -196,8 +196,12 @@ static void x4x_init(void *const chip_info)
    struct device *const d0f0 = dev_find_slot(0, 0);

/* Hide internal functions based on devicetree info. */
-	for (dev = 3; dev > 0; --dev) {
+	for (dev = 6; dev > 0; --dev) {
    	switch (dev) {
+		case 6: /* PEG1: only on P45 */
+			fn = 0;
+			bit_base = 13;
+			break;
    	case 3: /* ME */
    		fn = 3;
    		bit_base = 6;
@@ -206,10 +210,13 @@ static void x4x_init(void *const chip_info)
    		fn = 1;
    		bit_base = 3;
    		break;
-		case 1: /* PEG */
+		case 1: /* PEG0 */
    		fn = 0;
    		bit_base = 1;
    		break;
+		case 4: /* Should not happen */
+		case 5:
+			continue;
    	}
    	for (; fn >= 0; --fn) {
    		const struct device *const d =