Change in coreboot[master]: mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41866 )
Change subject: mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree ......................................................................
mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree
These devices never show on the PCI domain.
Change-Id: I2d4d99c1e96c15dacb950aeb85b3e9a5d127c791 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb 1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/41866/1
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index 2b23ca1..6328bc6 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -21,8 +21,6 @@ device pci 2.1 on # Integrated graphics controller 2 subsystemid 0x1458 0xd001 end - device pci 3.0 off end # ME - device pci 3.1 off end # ME chip southbridge/intel/i82801gx # Southbridge register "pirqa_routing" = "0x0b" register "pirqb_routing" = "0x0b"
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41866 )
Change subject: mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41866 )
Change subject: mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree ......................................................................
mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree
These devices never show on the PCI domain.
Change-Id: I2d4d99c1e96c15dacb950aeb85b3e9a5d127c791 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/41866 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb 1 file changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index 2b23ca1..6328bc6 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -21,8 +21,6 @@ device pci 2.1 on # Integrated graphics controller 2 subsystemid 0x1458 0xd001 end - device pci 3.0 off end # ME - device pci 3.1 off end # ME chip southbridge/intel/i82801gx # Southbridge register "pirqa_routing" = "0x0b" register "pirqb_routing" = "0x0b"
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41866 )
Change subject: mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4819 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4818 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4817 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4816
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Angel Pons (Code Review)
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Arthur Heymans (Code Review)
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Patrick Georgi (Code Review)