Change in coreboot[master]: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36438 )
Change subject: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol ......................................................................
sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol
All code in southbridge/intel/common is now properly guarded by a Kconfig symbol, making SOUTHBRIDGE_INTEL_COMMON obsolete.
Change-Id: Ifeccfaa9534f903e3f3543e1f9f3d5f3345b461e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/broadwell/Kconfig M src/soc/intel/fsp_broadwell_de/Kconfig M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/common/Kconfig M src/southbridge/intel/common/Makefile.inc M src/southbridge/intel/fsp_rangeley/Kconfig M src/southbridge/intel/i82371eb/Kconfig M src/southbridge/intel/i82801dx/Kconfig M src/southbridge/intel/i82801gx/Kconfig M src/southbridge/intel/i82801ix/Kconfig M src/southbridge/intel/i82801jx/Kconfig M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/lynxpoint/Kconfig 13 files changed, 0 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/36438/1
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index b118636..5856ef1 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -18,7 +18,6 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_RESET select HAVE_USBDEBUG select IOAPIC diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index 8f682ff..dc01092 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -12,7 +12,6 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RTC diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 4a56005..f561fe5 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -24,7 +24,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_SMBUS diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index 5674c2f..f44145b 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -1,17 +1,12 @@ -config SOUTHBRIDGE_INTEL_COMMON - def_bool n - config SOUTHBRIDGE_INTEL_COMMON_RESET def_bool n select HAVE_CF9_RESET
config SOUTHBRIDGE_INTEL_COMMON_RTC def_bool n - depends on SOUTHBRIDGE_INTEL_COMMON
config SOUTHBRIDGE_INTEL_COMMON_PMCLIB def_bool n - depends on SOUTHBRIDGE_INTEL_COMMON depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
config SOUTHBRIDGE_INTEL_COMMON_PMBASE @@ -86,7 +81,6 @@
config SOUTHBRIDGE_INTEL_COMMON_WATCHDOG bool - depends on SOUTHBRIDGE_INTEL_COMMON depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
if SOUTHBRIDGE_INTEL_COMMON_FINALIZE diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index d8091f7..68e423a 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -25,8 +25,6 @@
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c
-ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y) - all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
@@ -54,5 +52,3 @@ smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c - -endif diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig index a25c430..56c02b5 100644 --- a/src/southbridge/intel/fsp_rangeley/Kconfig +++ b/src/southbridge/intel/fsp_rangeley/Kconfig @@ -29,7 +29,6 @@ select PCIEXP_COMMON_CLOCK select SPI_FLASH select INTEL_DESCRIPTOR_MODE_CAPABLE - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_PMBASE diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig index f725926..f5b5f4e 100644 --- a/src/southbridge/intel/i82371eb/Kconfig +++ b/src/southbridge/intel/i82371eb/Kconfig @@ -1,6 +1,5 @@ config SOUTHBRIDGE_INTEL_I82371EB select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 7cf7b97..916560a 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -20,7 +20,6 @@ select IOAPIC select HAVE_SMI_HANDLER select HAVE_USBDEBUG - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 37b5e6d..b0cdfd4 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -16,7 +16,6 @@ config SOUTHBRIDGE_INTEL_I82801GX bool select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select IOAPIC select HAVE_USBDEBUG select USE_WATCHDOG_ON_BOOT diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index f1bfcfc..9f821ae 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -16,7 +16,6 @@
config SOUTHBRIDGE_INTEL_I82801IX bool - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35 select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index 7a49e57..eeb843e 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -16,7 +16,6 @@
config SOUTHBRIDGE_INTEL_I82801JX bool - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index 99fc2cd..9976cb1 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -27,7 +27,6 @@ select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_SMBUS diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index ac2a8f7..95b9f62 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -21,7 +21,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
Hello Patrick Rudolph, Philipp Deppenwiese, build bot (Jenkins), Nico Huber, David Guckian, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36438
to look at the new patch set (#2).
Change subject: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol ......................................................................
sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol
All code in southbridge/intel/common is now properly guarded by a Kconfig symbol, making SOUTHBRIDGE_INTEL_COMMON obsolete.
Change-Id: Ifeccfaa9534f903e3f3543e1f9f3d5f3345b461e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/broadwell/Kconfig M src/soc/intel/fsp_broadwell_de/Kconfig M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/common/Kconfig M src/southbridge/intel/common/Makefile.inc M src/southbridge/intel/fsp_rangeley/Kconfig M src/southbridge/intel/i82371eb/Kconfig M src/southbridge/intel/i82801dx/Kconfig M src/southbridge/intel/i82801gx/Kconfig M src/southbridge/intel/i82801ix/Kconfig M src/southbridge/intel/i82801jx/Kconfig M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/lynxpoint/Kconfig 13 files changed, 0 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/36438/2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36438 )
Change subject: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol ......................................................................
Patch Set 3: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36438 )
Change subject: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol ......................................................................
sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol
All code in southbridge/intel/common is now properly guarded by a Kconfig symbol, making SOUTHBRIDGE_INTEL_COMMON obsolete.
Change-Id: Ifeccfaa9534f903e3f3543e1f9f3d5f3345b461e Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/36438 Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/fsp_broadwell_de/Kconfig M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/common/Kconfig M src/southbridge/intel/common/Makefile.inc M src/southbridge/intel/fsp_rangeley/Kconfig M src/southbridge/intel/i82371eb/Kconfig M src/southbridge/intel/i82801dx/Kconfig M src/southbridge/intel/i82801gx/Kconfig M src/southbridge/intel/i82801ix/Kconfig M src/southbridge/intel/i82801jx/Kconfig M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/lynxpoint/Kconfig 12 files changed, 0 insertions(+), 21 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index c5417ae..4c45f29 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -12,7 +12,6 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RTC diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 4a56005..f561fe5 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -24,7 +24,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_SMBUS diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index 5674c2f..57c0dbe 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -1,22 +1,16 @@ -config SOUTHBRIDGE_INTEL_COMMON - def_bool n - config SOUTHBRIDGE_INTEL_COMMON_RESET def_bool n select HAVE_CF9_RESET
config SOUTHBRIDGE_INTEL_COMMON_RTC def_bool n - depends on SOUTHBRIDGE_INTEL_COMMON
config SOUTHBRIDGE_INTEL_COMMON_PMCLIB def_bool n - depends on SOUTHBRIDGE_INTEL_COMMON depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
config SOUTHBRIDGE_INTEL_COMMON_PMBASE def_bool n - depends on SOUTHBRIDGE_INTEL_COMMON
config SOUTHBRIDGE_INTEL_COMMON_GPIO def_bool n @@ -86,7 +80,6 @@
config SOUTHBRIDGE_INTEL_COMMON_WATCHDOG bool - depends on SOUTHBRIDGE_INTEL_COMMON depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
if SOUTHBRIDGE_INTEL_COMMON_FINALIZE diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index d8091f7..68e423a 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -25,8 +25,6 @@
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c
-ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y) - all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
@@ -54,5 +52,3 @@ smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c - -endif diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig index a25c430..56c02b5 100644 --- a/src/southbridge/intel/fsp_rangeley/Kconfig +++ b/src/southbridge/intel/fsp_rangeley/Kconfig @@ -29,7 +29,6 @@ select PCIEXP_COMMON_CLOCK select SPI_FLASH select INTEL_DESCRIPTOR_MODE_CAPABLE - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_PMBASE diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig index f725926..f5b5f4e 100644 --- a/src/southbridge/intel/i82371eb/Kconfig +++ b/src/southbridge/intel/i82371eb/Kconfig @@ -1,6 +1,5 @@ config SOUTHBRIDGE_INTEL_I82371EB select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 7cf7b97..916560a 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -20,7 +20,6 @@ select IOAPIC select HAVE_SMI_HANDLER select HAVE_USBDEBUG - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 37b5e6d..b0cdfd4 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -16,7 +16,6 @@ config SOUTHBRIDGE_INTEL_I82801GX bool select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select IOAPIC select HAVE_USBDEBUG select USE_WATCHDOG_ON_BOOT diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index 52fc5ea..cd2f76d 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -16,7 +16,6 @@
config SOUTHBRIDGE_INTEL_I82801IX bool - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35 select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index 7a49e57..eeb843e 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -16,7 +16,6 @@
config SOUTHBRIDGE_INTEL_I82801JX bool - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index 5afc6ac..c84a66d 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -27,7 +27,6 @@ select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_SMBUS diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index ac2a8f7..95b9f62 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -21,7 +21,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36438 )
Change subject: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol ......................................................................
Patch Set 5:
Sadly it seems that "guard" is imperfect - this commit is causing an error for AMD boards if USBDEBUG is enabled: ... CC bootblock/lib/version.o CC bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o CC bootblock/southbridge/intel/common/usb_debug.o CC bootblock/superio/ite/common/early_serial.o LINK cbfs/fallback/bootblock.debug /home/owner/tmp/coreboot/util/crossgcc/xgcc/bin/i386-elf-ld.bfd: build/bootblock/southbridge/intel/common/usb_debug.o: in function `pci_ehci_dbg_dev': /home/owner/tmp/coreboot/src/southbridge/intel/common/usb_debug.c:35: multiple definition of `pci_ehci_dbg_dev'; build/bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o:/home/owner/tmp/coreboot/src/southbridge/amd/agesa/hudson/enable_usbdebug.c:29: first defined here /home/owner/tmp/coreboot/util/crossgcc/xgcc/bin/i386-elf-ld.bfd: build/bootblock/southbridge/intel/common/usb_debug.o: in function `pci_ehci_dbg_set_port': /home/owner/tmp/coreboot/src/southbridge/intel/common/usb_debug.c:51: multiple definition of `pci_ehci_dbg_set_port'; build/bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o:/home/owner/tmp/coreboot/src/southbridge/amd/agesa/hudson/enable_usbdebug.c:43: first defined here make: *** [src/arch/x86/Makefile.inc:177: build/cbfs/fallback/bootblock.debug] Error 1
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36438 )
Change subject: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol ......................................................................
Patch Set 5:
Patch Set 5:
Sadly it seems that "guard" is imperfect - this commit is causing an error for AMD boards if USBDEBUG is enabled: ... CC bootblock/lib/version.o CC bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o CC bootblock/southbridge/intel/common/usb_debug.o CC bootblock/superio/ite/common/early_serial.o LINK cbfs/fallback/bootblock.debug /home/owner/tmp/coreboot/util/crossgcc/xgcc/bin/i386-elf-ld.bfd: build/bootblock/southbridge/intel/common/usb_debug.o: in function `pci_ehci_dbg_dev': /home/owner/tmp/coreboot/src/southbridge/intel/common/usb_debug.c:35: multiple definition of `pci_ehci_dbg_dev'; build/bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o:/home/owner/tmp/coreboot/src/southbridge/amd/agesa/hudson/enable_usbdebug.c:29: first defined here /home/owner/tmp/coreboot/util/crossgcc/xgcc/bin/i386-elf-ld.bfd: build/bootblock/southbridge/intel/common/usb_debug.o: in function `pci_ehci_dbg_set_port': /home/owner/tmp/coreboot/src/southbridge/intel/common/usb_debug.c:51: multiple definition of `pci_ehci_dbg_set_port'; build/bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o:/home/owner/tmp/coreboot/src/southbridge/amd/agesa/hudson/enable_usbdebug.c:43: first defined here make: *** [src/arch/x86/Makefile.inc:177: build/cbfs/fallback/bootblock.debug] Error 1
A new symbol for usb_debug.c is indeed needed. Thx for noticing.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36438 )
Change subject: sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol ......................................................................
Patch Set 5:
Patch Set 5:
Sadly it seems that "guard" is imperfect - this commit is causing an error for AMD boards if USBDEBUG is enabled: ... CC bootblock/lib/version.o CC bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o CC bootblock/southbridge/intel/common/usb_debug.o CC bootblock/superio/ite/common/early_serial.o LINK cbfs/fallback/bootblock.debug /home/owner/tmp/coreboot/util/crossgcc/xgcc/bin/i386-elf-ld.bfd: build/bootblock/southbridge/intel/common/usb_debug.o: in function `pci_ehci_dbg_dev': /home/owner/tmp/coreboot/src/southbridge/intel/common/usb_debug.c:35: multiple definition of `pci_ehci_dbg_dev'; build/bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o:/home/owner/tmp/coreboot/src/southbridge/amd/agesa/hudson/enable_usbdebug.c:29: first defined here /home/owner/tmp/coreboot/util/crossgcc/xgcc/bin/i386-elf-ld.bfd: build/bootblock/southbridge/intel/common/usb_debug.o: in function `pci_ehci_dbg_set_port': /home/owner/tmp/coreboot/src/southbridge/intel/common/usb_debug.c:51: multiple definition of `pci_ehci_dbg_set_port'; build/bootblock/southbridge/amd/agesa/hudson/enable_usbdebug.o:/home/owner/tmp/coreboot/src/southbridge/amd/agesa/hudson/enable_usbdebug.c:43: first defined here make: *** [src/arch/x86/Makefile.inc:177: build/cbfs/fallback/bootblock.debug] Error 1
Such things could be noticed by Jenkins if an AMD device was added to configs/ with non default options enabed, such that they get build tested.
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Arthur Heymans (Code Review) -
Mike Banon (Code Review)
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Nico Huber (Code Review)