Nico Huber has posted comments on this change. ( https://review.coreboot.org/21847 )
Change subject: nb/intel/gm45: Remove UMA alignment optimization
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Patch Set 1:
Gone through all available CMOS settings, MTRR usage:
SIZE WB/UC
32MiB 6/10
48MiB 7/11 (but only 6 available with my Penryn processor)
64MiB 5/8
96MiB 6/9
128MiB 5/8
160MiB 6/9
224MiB 6/8
256MiB 5/8
352MiB 6/8
Basically, multiples of 32MiB work fine.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I3f4ceec4224d86113be9bfa3ce4759bed584640d
Gerrit-Change-Number: 21847
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber
nico.h@gmx.de
Gerrit-Reviewer: Arthur Heymans
arthur@aheymans.xyz
Gerrit-Reviewer: Nico Huber
nico.h@gmx.de
Gerrit-Reviewer: build bot (Jenkins)
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Gerrit-Comment-Date: Tue, 03 Oct 2017 12:45:51 +0000
Gerrit-HasComments: No