Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72876 )
Change subject: soc/amd/*/data_fabric: rename define for MMIO decode register set count ......................................................................
soc/amd/*/data_fabric: rename define for MMIO decode register set count
This should make it a bit clearer that those registers are in the data fabric configuration registers. Also move those defines right after the register definition those are related to.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ic107bd217f4af0a9ddfbe41aafd3c882aa968e22 --- M src/soc/amd/cezanne/include/soc/data_fabric.h M src/soc/amd/common/block/data_fabric/data_fabric_helper.c M src/soc/amd/glinda/include/soc/data_fabric.h M src/soc/amd/mendocino/include/soc/data_fabric.h M src/soc/amd/phoenix/include/soc/data_fabric.h M src/soc/amd/picasso/include/soc/data_fabric.h 6 files changed, 27 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/72876/1
diff --git a/src/soc/amd/cezanne/include/soc/data_fabric.h b/src/soc/amd/cezanne/include/soc/data_fabric.h index a1f8b70..8e5c278 100644 --- a/src/soc/amd/cezanne/include/soc/data_fabric.h +++ b/src/soc/amd/cezanne/include/soc/data_fabric.h @@ -11,14 +11,14 @@ #define D18F0_MMIO_SHIFT 16 #define D18F0_MMIO_CTRL0 0x208
+#define DF_MMIO_REG_SET_COUNT 8 + #define DF_FICAA_BIOS 0x5C #define DF_FICAD_LO 0x98 #define DF_FICAD_HI 0x9C
#define IOMS0_FABRIC_ID 10
-#define NUM_NB_MMIO_REGS 8 - union df_mmio_control { struct { uint32_t re : 1; /* [ 0.. 0] */ diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index b64edcd..f3548fc 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -52,7 +52,7 @@ printk(BIOS_SPEW, "=== Data Fabric MMIO configuration registers ===\n" "idx control base limit\n"); - for (unsigned int i = 0; i < NUM_NB_MMIO_REGS; i++) { + for (unsigned int i = 0; i < DF_MMIO_REG_SET_COUNT; i++) { control = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); /* Base and limit address registers don't contain the lower address bits, but are shifted by D18F0_MMIO_SHIFT bits */ @@ -84,7 +84,7 @@
int data_fabric_find_unused_mmio_reg(void) { - for (unsigned int i = 0; i < NUM_NB_MMIO_REGS; i++) { + for (unsigned int i = 0; i < DF_MMIO_REG_SET_COUNT; i++) { if (is_mmio_reg_disabled(i)) return i; } @@ -122,7 +122,7 @@
data_fabric_print_mmio_conf();
- for (i = 0; i < NUM_NB_MMIO_REGS; i++) { + for (i = 0; i < DF_MMIO_REG_SET_COUNT; i++) { /* Adjust all registers that overlap */ ctrl.raw = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); if (!(ctrl.we || ctrl.re)) diff --git a/src/soc/amd/glinda/include/soc/data_fabric.h b/src/soc/amd/glinda/include/soc/data_fabric.h index 7be4b15..5a1e77c 100644 --- a/src/soc/amd/glinda/include/soc/data_fabric.h +++ b/src/soc/amd/glinda/include/soc/data_fabric.h @@ -11,14 +11,14 @@ #define D18F0_MMIO_SHIFT 16 #define D18F0_MMIO_CTRL0 0xD88
+#define DF_MMIO_REG_SET_COUNT 8 + #define DF_FICAA_BIOS 0x8C #define DF_FICAD_LO 0xB8 #define DF_FICAD_HI 0xBC
#define IOMS0_FABRIC_ID 15
-#define NUM_NB_MMIO_REGS 8 - union df_mmio_control { struct { uint32_t re : 1; /* [ 0.. 0] */ diff --git a/src/soc/amd/mendocino/include/soc/data_fabric.h b/src/soc/amd/mendocino/include/soc/data_fabric.h index ae5f267..fc36b81 100644 --- a/src/soc/amd/mendocino/include/soc/data_fabric.h +++ b/src/soc/amd/mendocino/include/soc/data_fabric.h @@ -11,14 +11,14 @@ #define D18F0_MMIO_SHIFT 16 #define D18F0_MMIO_CTRL0 0x208
+#define DF_MMIO_REG_SET_COUNT 8 + #define DF_FICAA_BIOS 0x5C #define DF_FICAD_LO 0x98 #define DF_FICAD_HI 0x9C
#define IOMS0_FABRIC_ID 9
-#define NUM_NB_MMIO_REGS 8 - union df_mmio_control { struct { uint32_t re : 1; /* [ 0.. 0] */ diff --git a/src/soc/amd/phoenix/include/soc/data_fabric.h b/src/soc/amd/phoenix/include/soc/data_fabric.h index cdd9b1a..a983d54 100644 --- a/src/soc/amd/phoenix/include/soc/data_fabric.h +++ b/src/soc/amd/phoenix/include/soc/data_fabric.h @@ -11,14 +11,14 @@ #define D18F0_MMIO_SHIFT 16 #define D18F0_MMIO_CTRL0 0xD88
+#define DF_MMIO_REG_SET_COUNT 8 + #define DF_FICAA_BIOS 0x8C #define DF_FICAD_LO 0xB8 #define DF_FICAD_HI 0xBC
#define IOMS0_FABRIC_ID 14
-#define NUM_NB_MMIO_REGS 8 - union df_mmio_control { struct { uint32_t re : 1; /* [ 0.. 0] */ diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h index dc77fee..8a5725d 100644 --- a/src/soc/amd/picasso/include/soc/data_fabric.h +++ b/src/soc/amd/picasso/include/soc/data_fabric.h @@ -11,14 +11,14 @@ #define D18F0_MMIO_SHIFT 16 #define D18F0_MMIO_CTRL0 0x208
+#define DF_MMIO_REG_SET_COUNT 8 + #define DF_FICAA_BIOS 0x5C #define DF_FICAD_LO 0x98 #define DF_FICAD_HI 0x9C
#define IOMS0_FABRIC_ID 9
-#define NUM_NB_MMIO_REGS 8 - union df_mmio_control { struct { uint32_t re : 1; /* [ 0.. 0] */