Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57274 )
Change subject: mb/intel/adlrvp_p: Enable TCSS USB ports device path ......................................................................
mb/intel/adlrvp_p: Enable TCSS USB ports device path
TEST=Boot RVP, ensure Type C ports operate correctly.
Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/57274 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb 1 file changed, 19 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb index bfc8991..e78d00f 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb @@ -9,6 +9,25 @@ device pnp 0c09.0 on end end end + device ref tcss_xhci on + chip drivers/usb/acpi + register "type" = "UPC_TYPE_HUB" + device ref tcss_root_hub on + chip drivers/usb/acpi + register "desc" = ""TypeC Port 1"" + device ref tcss_usb3_port1 on end + end + chip drivers/usb/acpi + register "desc" = ""TypeC Port 2"" + device ref tcss_usb3_port2 on end + end + chip drivers/usb/acpi + register "desc" = ""TypeC Port 3"" + device ref tcss_usb3_port3 on end + end + end + end + end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy.