Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46728 )
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
azalia: Use `HDA_GCTL_CRST` macro as unset-mask
The `HDA_GCTL_CRST` corresponds to bit zero, so this is equivalent.
Change-Id: I5f4455aa1255f8954ac8b5f1ea5cf8f0874f77a4 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 5 files changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/46728/1
diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c index b91151a..972b253 100644 --- a/src/southbridge/intel/bd82x6x/azalia.c +++ b/src/southbridge/intel/bd82x6x/azalia.c @@ -46,7 +46,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */ diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index 6cf1fea..1927adc 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c index 0e0ccd6..d6c7533 100644 --- a/src/southbridge/intel/i82801ix/azalia.c +++ b/src/southbridge/intel/i82801ix/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c index 3b2289ed..bf41490 100644 --- a/src/southbridge/intel/i82801jx/azalia.c +++ b/src/southbridge/intel/i82801jx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c index c947092..97e705e2 100644 --- a/src/southbridge/intel/ibexpeak/azalia.c +++ b/src/southbridge/intel/ibexpeak/azalia.c @@ -42,7 +42,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46728
to look at the new patch set (#4).
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
azalia: Use `HDA_GCTL_CRST` macro as unset-mask
The `HDA_GCTL_CRST` corresponds to bit zero, so this is equivalent.
Change-Id: I5f4455aa1255f8954ac8b5f1ea5cf8f0874f77a4 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 5 files changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/46728/4
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46728 )
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
Patch Set 4: Code-Review+1
Hello build bot (Jenkins), Paul Menzel, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46728
to look at the new patch set (#6).
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
azalia: Use `HDA_GCTL_CRST` macro as unset-mask
The `HDA_GCTL_CRST` corresponds to bit zero, so this is equivalent.
Change-Id: I5f4455aa1255f8954ac8b5f1ea5cf8f0874f77a4 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 5 files changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/46728/6
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46728 )
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
Patch Set 11: Code-Review+1
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46728 )
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46728/11/src/southbridge/intel/ibex... File src/southbridge/intel/ibexpeak/azalia.c:
https://review.coreboot.org/c/coreboot/+/46728/11/src/southbridge/intel/ibex... PS11, Line 45: set_bits oof, maybe it's just me but set_bits is confusing; what about reworking that to have unset_and_set_bits(reg, unset, set), unset_bits(reg, unset) and set_bits(reg, set) just like we have now for msrs? CB:46354
Nico, wdyt?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46728 )
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46728/11/src/southbridge/intel/ibex... File src/southbridge/intel/ibexpeak/azalia.c:
https://review.coreboot.org/c/coreboot/+/46728/11/src/southbridge/intel/ibex... PS11, Line 45: set_bits
oof, maybe it's just me but set_bits is confusing; what about reworking that to have unset_and_set_b […]
Maybe. I'll drop this patch from the train to avoid stalls, though.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46728 )
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
Patch Set 11: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46728/11/src/southbridge/intel/ibex... File src/southbridge/intel/ibexpeak/azalia.c:
https://review.coreboot.org/c/coreboot/+/46728/11/src/southbridge/intel/ibex... PS11, Line 45: set_bits
Maybe. I'll drop this patch from the train to avoid stalls, though.
I put that on my todo list; it was there before, so let's keep it for now
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46728 )
Change subject: azalia: Use `HDA_GCTL_CRST` macro as unset-mask ......................................................................
azalia: Use `HDA_GCTL_CRST` macro as unset-mask
The `HDA_GCTL_CRST` corresponds to bit zero, so this is equivalent.
Change-Id: I5f4455aa1255f8954ac8b5f1ea5cf8f0874f77a4 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46728 Reviewed-by: Michael Niewöhner foss@mniewoehner.de Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 5 files changed, 8 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Michael Niewöhner: Looks good to me, approved
diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c index b91151a..972b253 100644 --- a/src/southbridge/intel/bd82x6x/azalia.c +++ b/src/southbridge/intel/bd82x6x/azalia.c @@ -46,7 +46,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */ diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index 6cf1fea..1927adc 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c index 0e0ccd6..d6c7533 100644 --- a/src/southbridge/intel/i82801ix/azalia.c +++ b/src/southbridge/intel/i82801ix/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c index 3b2289ed..bf41490 100644 --- a/src/southbridge/intel/i82801jx/azalia.c +++ b/src/southbridge/intel/i82801jx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c index c947092..97e705e2 100644 --- a/src/southbridge/intel/ibexpeak/azalia.c +++ b/src/southbridge/intel/ibexpeak/azalia.c @@ -42,7 +42,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */
-
Angel Pons (Code Review) -
Michael Niewöhner (Code Review)
-
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)