Change in coreboot[master]: util/*: more typo fixes

[Patrick Georgi (Code Review)]

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38651 )

Change subject: util/*: more typo fixes
......................................................................

util/*: more typo fixes

Found by: util/lint/checkpatch.pl --types TYPO_SPELLING --fix-inplace
--strict --terse -f $(find util -name '*.[ch]')

Change-Id: I059071fd3a2edb41c72fc57fccbb520bd2ebb757
Signed-off-by: Patrick Georgi 
---
M util/cbfstool/elf.h
M util/cbfstool/flashmap/fmap.h
M util/cbmem/cbmem.c
M util/marvell/doimage_mv/doimage.c
M util/nvramtool/accessors/layout-text.c
M util/nvramtool/cbfs.h
M util/pgtblgen/pgtblgen.c
M util/superiotool/ite.c
8 files changed, 11 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/38651/1

diff --git a/util/cbfstool/elf.h b/util/cbfstool/elf.h
index 43fd7f3..11cee4f 100644
--- a/util/cbfstool/elf.h
+++ b/util/cbfstool/elf.h
@@ -318,7 +318,7 @@
 #define SHT_FINI_ARRAY	  15		/* Array of destructors */
 #define SHT_PREINIT_ARRAY 16		/* Array of pre-constructors */
 #define SHT_GROUP	  17		/* Section group */
-#define SHT_SYMTAB_SHNDX  18		/* Extended section indeces */
+#define SHT_SYMTAB_SHNDX  18		/* Extended section indices */
 #define	SHT_NUM		  19		/* Number of defined types.  */
 #define SHT_LOOS	  0x60000000	/* Start OS-specific.  */
 #define SHT_GNU_HASH	  0x6ffffff6	/* GNU-style hash table.  */
@@ -1697,9 +1697,9 @@
 #define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
 #define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */

-/* Additional section indeces.  */
+/* Additional section indices.  */

-#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
+#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tentatively declared
    				      symbols in ANSI C.  */
 #define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */

diff --git a/util/cbfstool/flashmap/fmap.h b/util/cbfstool/flashmap/fmap.h
index e360011..7f147ce 100644
--- a/util/cbfstool/flashmap/fmap.h
+++ b/util/cbfstool/flashmap/fmap.h
@@ -91,7 +91,7 @@
  *
  * @map:	raw map data
  *
- * returns 0 to indiciate success
+ * returns 0 to indicate success
  * returns <0 to indicate failure
  */
 extern int fmap_print(const struct fmap *map);
diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c
index ca6a2f4..f8da7da 100644
--- a/util/cbmem/cbmem.c
+++ b/util/cbmem/cbmem.c
@@ -258,7 +258,7 @@
  * passed in memory offset.  Could be called recursively in case a forwarding
  * entry is found.
  *
- * Returns pointer to a memory buffer containg the timestamp table or zero if
+ * Returns pointer to a memory buffer containing the timestamp table or zero if
  * none found.
  */

diff --git a/util/marvell/doimage_mv/doimage.c b/util/marvell/doimage_mv/doimage.c
index 18675aa..5ead1f8 100644
--- a/util/marvell/doimage_mv/doimage.c
+++ b/util/marvell/doimage_mv/doimage.c
@@ -589,7 +589,7 @@
    		   For NAND it should be aligned to 512 bytes boundary
    		   (for ECC)
    		   The image immediately follows the header block,
-			   so if the source addess is undefined, it should be
+			   so if the source address is undefined, it should be
    		   derived from the header size.
    		   The headers size is always  alighed to 4 byte
    		   boundary */
diff --git a/util/nvramtool/accessors/layout-text.c b/util/nvramtool/accessors/layout-text.c
index 9567b7f..7bcfb93 100644
--- a/util/nvramtool/accessors/layout-text.c
+++ b/util/nvramtool/accessors/layout-text.c
@@ -536,7 +536,7 @@
 /****************************************************************************
  * process_checksum_info
  *
- * Get line conatining CMOS checksum information.
+ * Get line containing CMOS checksum information.
  ****************************************************************************/
 static void process_checksum_info(FILE * f)
 {
diff --git a/util/nvramtool/cbfs.h b/util/nvramtool/cbfs.h
index b384ae9..47c9ad8 100644
--- a/util/nvramtool/cbfs.h
+++ b/util/nvramtool/cbfs.h
@@ -53,7 +53,7 @@
 typedef uint8_t u8;

/** These are standard values for the known compression
-    alogrithms that coreboot knows about for stages and
+    algorithms that coreboot knows about for stages and
     payloads.  Of course, other CBFS users can use whatever
     values they want, as long as they understand them. */

diff --git a/util/pgtblgen/pgtblgen.c b/util/pgtblgen/pgtblgen.c
index 3a41a90..234fd72 100644
--- a/util/pgtblgen/pgtblgen.c
+++ b/util/pgtblgen/pgtblgen.c
@@ -26,7 +26,7 @@
 static void usage(char *argv[])
 {
    printf("usage: %s -b <addr> -a <arch> -o <file>\n", argv[0]);
-	printf("  -a\t architecure. Supported: x86_64\n");
+	printf("  -a\t architecture. Supported: x86_64\n");
    printf("  -b\t base address\n");
    printf("  -o\t the file to write to\n");
    printf("  -h\t show this help text\n");
diff --git a/util/superiotool/ite.c b/util/superiotool/ite.c
index 4e82845..81ab024 100644
--- a/util/superiotool/ite.c
+++ b/util/superiotool/ite.c
@@ -99,7 +99,7 @@
    	{NOLDN, "Chip Version",
    		{0x22,EOT},
    		{0x21,EOT}},
-		{NOLDN, "Super I/O Control Reigster (SIOCTRL)",
+		{NOLDN, "Super I/O Control Register (SIOCTRL)",
    		{0x23,EOT},
    		{0x01,EOT}},
    	{NOLDN, "Super I/O Configuration Register (SIOIRQ)",
@@ -227,7 +227,7 @@
    	{NOLDN, "Chip Version",
    		{0x22,EOT},
    		{0x63,EOT}},
-		{NOLDN, "Super I/O Control Reigster (SIOCTRL)",
+		{NOLDN, "Super I/O Control Register (SIOCTRL)",
    		{0x23,EOT},
    		{0x01,EOT}},
    	{NOLDN, "Super I/O Configuration Register (SIOIRQ)",

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38651 )

Change subject: util/*: more typo fixes
......................................................................

Patch Set 1: Code-Review+2

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38651 )

Change subject: util/*: more typo fixes
......................................................................

util/*: more typo fixes

Found by: util/lint/checkpatch.pl --types TYPO_SPELLING --fix-inplace
--strict --terse -f $(find util -name '*.[ch]')

Change-Id: I059071fd3a2edb41c72fc57fccbb520bd2ebb757
Signed-off-by: Patrick Georgi 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38651
Tested-by: build bot (Jenkins) 
Reviewed-by: HAOUAS Elyes 
---
M util/cbfstool/elf.h
M util/cbfstool/flashmap/fmap.h
M util/cbmem/cbmem.c
M util/marvell/doimage_mv/doimage.c
M util/nvramtool/accessors/layout-text.c
M util/nvramtool/cbfs.h
M util/pgtblgen/pgtblgen.c
M util/superiotool/ite.c
8 files changed, 11 insertions(+), 11 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  HAOUAS Elyes: Looks good to me, approved

diff --git a/util/cbfstool/elf.h b/util/cbfstool/elf.h
index 43fd7f3..11cee4f 100644
--- a/util/cbfstool/elf.h
+++ b/util/cbfstool/elf.h
@@ -318,7 +318,7 @@
 #define SHT_FINI_ARRAY	  15		/* Array of destructors */
 #define SHT_PREINIT_ARRAY 16		/* Array of pre-constructors */
 #define SHT_GROUP	  17		/* Section group */
-#define SHT_SYMTAB_SHNDX  18		/* Extended section indeces */
+#define SHT_SYMTAB_SHNDX  18		/* Extended section indices */
 #define	SHT_NUM		  19		/* Number of defined types.  */
 #define SHT_LOOS	  0x60000000	/* Start OS-specific.  */
 #define SHT_GNU_HASH	  0x6ffffff6	/* GNU-style hash table.  */
@@ -1697,9 +1697,9 @@
 #define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
 #define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */

-/* Additional section indeces.  */
+/* Additional section indices.  */

-#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
+#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tentatively declared
    				      symbols in ANSI C.  */
 #define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */

diff --git a/util/cbfstool/flashmap/fmap.h b/util/cbfstool/flashmap/fmap.h
index e360011..7f147ce 100644
--- a/util/cbfstool/flashmap/fmap.h
+++ b/util/cbfstool/flashmap/fmap.h
@@ -91,7 +91,7 @@
  *
  * @map:	raw map data
  *
- * returns 0 to indiciate success
+ * returns 0 to indicate success
  * returns <0 to indicate failure
  */
 extern int fmap_print(const struct fmap *map);
diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c
index ca6a2f4..f8da7da 100644
--- a/util/cbmem/cbmem.c
+++ b/util/cbmem/cbmem.c
@@ -258,7 +258,7 @@
  * passed in memory offset.  Could be called recursively in case a forwarding
  * entry is found.
  *
- * Returns pointer to a memory buffer containg the timestamp table or zero if
+ * Returns pointer to a memory buffer containing the timestamp table or zero if
  * none found.
  */

diff --git a/util/marvell/doimage_mv/doimage.c b/util/marvell/doimage_mv/doimage.c
index 18675aa..5ead1f8 100644
--- a/util/marvell/doimage_mv/doimage.c
+++ b/util/marvell/doimage_mv/doimage.c
@@ -589,7 +589,7 @@
    		   For NAND it should be aligned to 512 bytes boundary
    		   (for ECC)
    		   The image immediately follows the header block,
-			   so if the source addess is undefined, it should be
+			   so if the source address is undefined, it should be
    		   derived from the header size.
    		   The headers size is always  alighed to 4 byte
    		   boundary */
diff --git a/util/nvramtool/accessors/layout-text.c b/util/nvramtool/accessors/layout-text.c
index 9567b7f..7bcfb93 100644
--- a/util/nvramtool/accessors/layout-text.c
+++ b/util/nvramtool/accessors/layout-text.c
@@ -536,7 +536,7 @@
 /****************************************************************************
  * process_checksum_info
  *
- * Get line conatining CMOS checksum information.
+ * Get line containing CMOS checksum information.
  ****************************************************************************/
 static void process_checksum_info(FILE * f)
 {
diff --git a/util/nvramtool/cbfs.h b/util/nvramtool/cbfs.h
index b384ae9..47c9ad8 100644
--- a/util/nvramtool/cbfs.h
+++ b/util/nvramtool/cbfs.h
@@ -53,7 +53,7 @@
 typedef uint8_t u8;

/** These are standard values for the known compression
-    alogrithms that coreboot knows about for stages and
+    algorithms that coreboot knows about for stages and
     payloads.  Of course, other CBFS users can use whatever
     values they want, as long as they understand them. */

diff --git a/util/pgtblgen/pgtblgen.c b/util/pgtblgen/pgtblgen.c
index 3a41a90..234fd72 100644
--- a/util/pgtblgen/pgtblgen.c
+++ b/util/pgtblgen/pgtblgen.c
@@ -26,7 +26,7 @@
 static void usage(char *argv[])
 {
    printf("usage: %s -b <addr> -a <arch> -o <file>\n", argv[0]);
-	printf("  -a\t architecure. Supported: x86_64\n");
+	printf("  -a\t architecture. Supported: x86_64\n");
    printf("  -b\t base address\n");
    printf("  -o\t the file to write to\n");
    printf("  -h\t show this help text\n");
diff --git a/util/superiotool/ite.c b/util/superiotool/ite.c
index 4e82845..81ab024 100644
--- a/util/superiotool/ite.c
+++ b/util/superiotool/ite.c
@@ -99,7 +99,7 @@
    	{NOLDN, "Chip Version",
    		{0x22,EOT},
    		{0x21,EOT}},
-		{NOLDN, "Super I/O Control Reigster (SIOCTRL)",
+		{NOLDN, "Super I/O Control Register (SIOCTRL)",
    		{0x23,EOT},
    		{0x01,EOT}},
    	{NOLDN, "Super I/O Configuration Register (SIOIRQ)",
@@ -227,7 +227,7 @@
    	{NOLDN, "Chip Version",
    		{0x22,EOT},
    		{0x63,EOT}},
-		{NOLDN, "Super I/O Control Reigster (SIOCTRL)",
+		{NOLDN, "Super I/O Control Register (SIOCTRL)",
    		{0x23,EOT},
    		{0x01,EOT}},
    	{NOLDN, "Super I/O Configuration Register (SIOIRQ)",