17 comments:
File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
Patch Set #1, Line 938: (dly_coarse_large_rodt_p1 << 4) | (dly_coarse_large_rodt_p1 << 12) |
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Patch Set #1, Line 939: (dly_coarse_large_rodt_p1 << 20) | (dly_coarse_large_rodt_p1 << 28));
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Patch Set #1, Line 944: (dly_coarse_0p5t_rodt_p1 << 4) | (dly_coarse_0p5t_rodt_p1 << 12) |
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Patch Set #1, Line 945: (dly_coarse_0p5t_rodt_p1 << 20) | (dly_coarse_0p5t_rodt_p1 << 28));
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Patch Set #1, Line 947: for (u8 dly_fine_xt = 0; dly_fine_xt < DQS_GW_FINE_END; dly_fine_xt += 4) {
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Patch Set #1, Line 991: dly_coarse_large, dly_coarse_0p5t, pass_begin, pass_count,
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Patch Set #1, Line 1581: vref_dly[index].win_center = params->tx_win_center[chn][rank][index];
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Patch Set #1, Line 1582: vref_dly[index].best_first = params->tx_first_pass[chn][rank][index];
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Patch Set #1, Line 1583: vref_dly[index].best_last = params->tx_last_pass[chn][rank][index];
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Patch Set #1, Line 1594: center_dly[byte].min_center = vref_dly[index].win_center;
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Patch Set #1, Line 1596: center_dly[byte].max_center = vref_dly[index].win_center;
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Patch Set #1, Line 1758: dramc_set_tx_best_dly(chn, rank, bypass_tx,vref_dly.perbit_dly, type,
space required after that ',' (ctx:VxV)
Patch Set #1, Line 1796: if (params->have_full_k_params && (type == RX_WIN_RD_DQC ||type == RX_WIN_TEST_ENG)) {
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Patch Set #1, Line 1796: if (params->have_full_k_params && (type == RX_WIN_RD_DQC ||type == RX_WIN_TEST_ENG)) {
spaces required around that '||' (ctx:WxV)
Patch Set #1, Line 1799: win_perbit[bit].best_first = params->rx_firspass[chn][rank][bit];
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Patch Set #1, Line 1813: /* pass window bigger than 7, consider as real pass window */
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Patch Set #1, Line 1841: if (dramk_calc_best_vref(type, vref_use, &vref_dly, win_perbit, &win_min_max))
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