Attention is currently required from: Hung-Te Lin. Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58837 )
Change subject: soc/mediatek/mt8186: Add NOR-Flash support ......................................................................
soc/mediatek/mt8186: Add NOR-Flash support
Add NOR-Flash drivers to pass verification of flash at verstage.
TEST=boot to romstage BUG=b:202871018
Signed-off-by: Rex-BC Chen rex-bc.chen@mediatek.com Change-Id: If51d765e1fd4895f97898710ec6fa1374e1048fb --- M src/soc/mediatek/mt8186/Kconfig M src/soc/mediatek/mt8186/Makefile.inc A src/soc/mediatek/mt8186/include/soc/symbols.h M src/soc/mediatek/mt8186/spi.c 4 files changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/58837/1
diff --git a/src/soc/mediatek/mt8186/Kconfig b/src/soc/mediatek/mt8186/Kconfig index 9fa391a..1821fa9 100644 --- a/src/soc/mediatek/mt8186/Kconfig +++ b/src/soc/mediatek/mt8186/Kconfig @@ -16,4 +16,11 @@ select VBOOT_SEPARATE_VERSTAGE select VBOOT_RETURN_FROM_VERSTAGE
+config FLASH_DUAL_READ + bool + default y + help + When this option is enabled, the flash controller provides the ability + to dual read mode. + endif diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc index 76dac4b..366c706 100644 --- a/src/soc/mediatek/mt8186/Makefile.inc +++ b/src/soc/mediatek/mt8186/Makefile.inc @@ -1,6 +1,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8186),y)
bootblock-y += bootblock.c +bootblock-y += ../common/flash_controller.c bootblock-y += ../common/gpio.c gpio.c bootblock-y += ../common/mmu_operations.c bootblock-$(CONFIG_SPI_FLASH) += spi.c @@ -8,6 +9,7 @@ bootblock-y += ../common/uart.c bootblock-y += ../common/wdt.c wdt.c
+verstage-y += ../common/flash_controller.c verstage-y += ../common/gpio.c gpio.c verstage-$(CONFIG_SPI_FLASH) += spi.c verstage-y += ../common/timer.c @@ -16,6 +18,7 @@
romstage-y += ../common/cbmem.c romstage-y += emi.c +romstage-y += ../common/flash_controller.c romstage-y += ../common/gpio.c gpio.c romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-y += ../common/timer.c @@ -23,6 +26,7 @@ romstage-y += ../common/wdt.c wdt.c
ramstage-y += emi.c +ramstage-y += ../common/flash_controller.c ramstage-y += ../common/gpio.c gpio.c ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-y += soc.c diff --git a/src/soc/mediatek/mt8186/include/soc/symbols.h b/src/soc/mediatek/mt8186/include/soc/symbols.h new file mode 100644 index 0000000..7610224 --- /dev/null +++ b/src/soc/mediatek/mt8186/include/soc/symbols.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_MEDIATEK_MT8186_SYMBOLS_H_ +#define _SOC_MEDIATEK_MT8186_SYMBOLS_H_ + +#include <symbols.h> + +DECLARE_REGION(dram_dma) + +#endif /* _SOC_MEDIATEK_MT8186_SYMBOLS_H_ */ diff --git a/src/soc/mediatek/mt8186/spi.c b/src/soc/mediatek/mt8186/spi.c index 9504925..e72b50f 100644 --- a/src/soc/mediatek/mt8186/spi.c +++ b/src/soc/mediatek/mt8186/spi.c @@ -7,15 +7,19 @@
#include <device/mmio.h> #include <soc/addressmap.h> +#include <soc/flash_controller_common.h> #include <soc/spi.h>
static const struct spi_ctrlr spi_flash_ctrlr = { .max_xfer_size = 65535, + .flash_probe = mtk_spi_flash_probe, };
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { { .ctrlr = &spi_flash_ctrlr, + .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, + .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, }, };