Michael Niewöhner submitted this change.

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soc/intel/skylake: Enable PCH thermal depending on devicetree

Hook up PCH thermal subsystem configuration to devicetree.

Change-Id: I84bac2cec079370370ecf1e5e4742e6704921d40
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47116
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
---
M src/mainboard/protectli/vault_kbl/ramstage.c
M src/soc/intel/skylake/chip.c
2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/protectli/vault_kbl/ramstage.c b/src/mainboard/protectli/vault_kbl/ramstage.c
index 962702f..9518b1d 100644
--- a/src/mainboard/protectli/vault_kbl/ramstage.c
+++ b/src/mainboard/protectli/vault_kbl/ramstage.c
@@ -13,7 +13,6 @@
 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 
 	params->TurboMode = 1;
-	params->PchThermalDeviceEnable = 0;
 	params->PchPort61hEnable = 1;
 	params->CdClock = 3;
 }
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 89eaef5..1e13428 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -295,6 +295,8 @@
 
 	dev = pcidev_path_on_root(SA_DEVFN_TS);
 	params->Device4Enable = dev && dev->enabled;
+	dev = pcidev_path_on_root(PCH_DEVFN_THERMAL);
+	params->PchThermalDeviceEnable = dev && dev->enabled;
 	params->EnableTcoTimer = !config->PmTimerDisabled;
 
 	tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi;

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