Attention is currently required from: Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Michael Niewöhner, EricR Lai.
4 comments:
File src/mainboard/intel/adlrvp/devicetree.cb:
one space is enough (applies to all ports)
tab (applies to all ports)
register "pch_pcie_rp[PCH_RP(8)]" = "{
.flags = PCIE_RP_CLK_SRC_UNUSED,
}"
register "pcie_clk_config_flag[6]" = "PCIE_CLK_FREE_RUNNING"
I know we've gone over this several times. Since we now know that a free-running CLKSRC doesn't use any CLKREQ, how about expressing this as follows?
# Enable PCH PCIE RP 8 using free running CLK 6
# Clock source is shared with LAN and hence marked as free running.
register "pch_pcie_rp[PCH_RP(8)]" = "{
.clk_src = 6,
.flags = PCIE_RP_CLK_REQ_UNUSED,
}"
If a port uses a CLKSRC but does not use any CLKREQ, we can configure the CLKSRC as free-running.
Patch Set #62, Line 72: .flags = PCIE_RP_CLK_SRC_UNUSED,
Does Optane need any CLKSRC?
To view, visit change 48340. To unsubscribe, or for help writing mail filters, visit settings.