Felix Singer submitted this change.

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Approvals: Patrick Rudolph: Looks good to me, approved build bot (Jenkins): Verified
mb/lenovo/t430: Convert remaining PCI numbers into reference names

Change-Id: Ib94dd2778cf89ae8b97b43031d729c728f59a29e
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79941
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb
M src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb
2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb
index 698460b..2515150 100644
--- a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb
+++ b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb
@@ -4,8 +4,8 @@
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# Enable hotplug on Port 5 for Thunderbolt controller
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 1, 0, 0, 0 }"
- device pci 1c.4 on end # PCIe Port #5 Thunderbolt controller
- device pci 1f.0 on
+ device ref pcie_rp5 on end # PCIe Port #5 Thunderbolt controller
+ device ref lpc on
chip ec/lenovo/h8
device pnp ff.2 on end # dummy
register "has_bdc_detection" = "1"
diff --git a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb
index fcd137f..3e13627 100644
--- a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb
+++ b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb
@@ -15,7 +15,7 @@
device domain 0 on
subsystemid 0x17aa 0x2208 inherit

- device pci 01.0 off end # PCIe Bridge for discrete graphics
+ device ref peg10 off end # PCIe Bridge for discrete graphics

chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA) & 4 (dock)
@@ -23,15 +23,15 @@
# T431s has no Express Card slot.
register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"

- device pci 1c.0 on # PCIe Port #1
+ device ref pcie_rp1 on # PCIe Port #1
chip drivers/ricoh/rce822 # Ricoh cardreader
register "disable_mask" = "0x87"
register "sdwppol" = "0"
device pci 00.0 on end # Ricoh SD card reader
end
end
- device pci 1c.2 off end # PCIe Port #3
- device pci 1f.0 on
+ device ref pcie_rp3 off end # PCIe Port #3
+ device ref lpc on
chip ec/lenovo/h8
device pnp ff.2 on end # dummy
register "config0" = "0xa6"
@@ -42,7 +42,7 @@
register "has_bdc_detection" = "0"
end
end # LPC Controller
- device pci 1f.6 off end # Thermal
+ device ref thermal off end # Thermal
end
end
end

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ib94dd2778cf89ae8b97b43031d729c728f59a29e
Gerrit-Change-Number: 79941
Gerrit-PatchSet: 2
Gerrit-Owner: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Gerrit-Reviewer: Alexander Couzens <lynxis@fe80.eu>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged