Attention is currently required from: Raul Rangel, Nikolai Vyssotski, Julian Schroeder, Felix Held.

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4 comments:

• File src/device/dram/lpddr4.c:

  • Patch Set #1, Line 42: 1600

    1333

    How did I miss this. Done.

  • Patch Set #1, Line 51: 934

    should this be 933?

    Could go either way. JEDEC Standard No. 79-4C / Table 169 says DDR4-1866 tck(avg) min = 1.071ns. 1/1.071ns = 933.7 mhz.

  • Patch Set #1, Line 52: 2400

    1866

    Done

  • Patch Set #1, Line 81: 2137

    should this be 2133?

    JEDEC Standard No. 209-4 Table 88 says LPDDR4-4266 tck(avg) min = 0.467ns. 1/0.467 = 2141Mhz, so this could technically be even higher. idk why 2137 was chosen originally. Maybe set it to 2133+1?

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