[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Crawford, Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph, EricR Lai.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60182 )

Change subject: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs
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Patch Set 4:

(1 comment)

Patchset:

PS4:
> Interesting, I did in romstage, FSP-S need do it again? […]

Pcie UPDs are split between FSP-M and FSP-S, so we might need to program those accordingly :(