Michał Żygowski uploaded patch set #7 to the change originally created by Gaggery Tsai.

View Change

cpu/x86/entry16: Do not disable cache when Boot Guard is supported

This patch is required for Boot Guard enabled platform. When system
is powered on, cache is default enabled. BIOS is forbidden to disable
cache while in NEM mode with BtG enabled.

TEST=Stitch boot guard ACM with signed KM and BPM &&
Enable FSP-T and boot all the way to the OS &&
Read MSR 0x13a and ensure boot guard verified boot and
measured boot are enabled.

Change-Id: Ie1def754f7b0024725638fcea481fd3273ef3d24
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
M src/cpu/x86/16bit/entry16.inc
1 file changed, 16 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/38252/7

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie1def754f7b0024725638fcea481fd3273ef3d24
Gerrit-Change-Number: 38252
Gerrit-PatchSet: 7
Gerrit-Owner: Gaggery Tsai <gaggery.tsai@intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan@intel.com>
Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai@intel.com>
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