mturney mturney would like ashk@codeaurora.org to review this change.

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HACK trogdor: Memlayout changed to support QcLib Size increase

Change-Id: I49008ea9bc6254c745352b2e8ee965ddc2e8e5e4
Signed-off-by: Ashwin Kumar <ashk@codeaurora.org>
---
M src/soc/qualcomm/sc7180/include/soc/memlayout.ld
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/36277/1

diff --git a/src/soc/qualcomm/sc7180/include/soc/memlayout.ld b/src/soc/qualcomm/sc7180/include/soc/memlayout.ld
index ce260aa..6ca3e95 100644
--- a/src/soc/qualcomm/sc7180/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/sc7180/include/soc/memlayout.ld
@@ -59,10 +59,10 @@
 	REGION(ddr_training, 0x14850000, 8K, 4K)
 	REGION(qclib_serial_log, 0x14852000, 4K, 4K)
 	REGION(ddr_information, 0x14853000, 1K, 1K)
-	REGION(dcb, 0x14870000, 16K, 4K)
-	REGION(pmic, 0x14874000, 44K, 4K)
-	REGION(limits_cfg, 0x1487F000, 4K, 4K)
-	REGION(qclib, 0x14880000, 512K, 4K)
+	REGION(dcb, 0x1485b000, 16K, 4K)
+	REGION(pmic, 0x1485f000, 44K, 4K)
+	REGION(limits_cfg, 0x1486a000, 4K, 4K)
+	REGION(qclib, 0x1486b000, 596K, 4K)
 	BSRAM_END(0x14900000)
 
 	DRAM_START(0x80000000)

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