Kapil Porwal has uploaded this change for review.
drivers/self_test/intel_cpu: Add self test submodule for Intel CPU
Add a self test submodule for Intel CPU. This module checks microcode
patch status on all the cores and logs an error if microcode patch has
not loaded on any of the cores.
BUG=b:233012780
TEST=Print self test result in the OS
Run the below command in the OS to get the self test logs:
$ cbmem -r 53545354 | hexdump -C
Sample output:
00000000 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00000010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*
00001000
Change-Id: Ie2e40e60609d4b5f2f0ea6dca0f6b51987890877
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
---
A src/drivers/self_test/modules/intel_cpu/Kconfig
A src/drivers/self_test/modules/intel_cpu/Makefile.mk
A src/drivers/self_test/modules/intel_cpu/st_intel_cpu.c
M src/include/self_test_id.h
4 files changed, 74 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/82046/1
diff --git a/src/drivers/self_test/modules/intel_cpu/Kconfig b/src/drivers/self_test/modules/intel_cpu/Kconfig
new file mode 100644
index 0000000..6085325
--- /dev/null
+++ b/src/drivers/self_test/modules/intel_cpu/Kconfig
@@ -0,0 +1,8 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config SELF_TEST_INTEL_CPU
+ bool "Enable tests for Intel CPU"
+ default y if CPU_INTEL_COMMON
+ select SELF_TEST
+ help
+ Enable tests for Intel CPU
diff --git a/src/drivers/self_test/modules/intel_cpu/Makefile.mk b/src/drivers/self_test/modules/intel_cpu/Makefile.mk
new file mode 100644
index 0000000..9b5cbf5
--- /dev/null
+++ b/src/drivers/self_test/modules/intel_cpu/Makefile.mk
@@ -0,0 +1 @@
+ramstage-$(CONFIG_SELF_TEST_INTEL_CPU) += st_intel_cpu.c
diff --git a/src/drivers/self_test/modules/intel_cpu/st_intel_cpu.c b/src/drivers/self_test/modules/intel_cpu/st_intel_cpu.c
new file mode 100644
index 0000000..dfc12d8
--- /dev/null
+++ b/src/drivers/self_test/modules/intel_cpu/st_intel_cpu.c
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootstate.h>
+#include <console/console.h>
+#include <self_test.h>
+
+#include <cpu/x86/msr.h>
+#include <arch/cpu.h>
+#include <smp/spinlock.h>
+#include <cpu/x86/mp.h>
+#include <intelblocks/mp_init.h>
+
+typedef struct {
+ unsigned int reg;
+ msr_t value[CONFIG_MAX_CPUS];
+} msr_per_cpu_t;
+
+static msr_per_cpu_t msr_per_cpu;
+static int cpu_count;
+DECLARE_SPIN_LOCK(st_lock);
+
+static void st_readmsr(void *unused)
+{
+ spin_lock(&st_lock);
+ msr_per_cpu.value[cpu_index()] = rdmsr(msr_per_cpu.reg);
+ spin_unlock(&st_lock);
+}
+
+static void st_readmsr_all_cpus(unsigned int reg)
+{
+ memset(&msr_per_cpu, 0, sizeof(msr_per_cpu));
+ msr_per_cpu.reg = reg;
+ if (mp_run_on_all_cpus(st_readmsr, NULL) != CB_SUCCESS) {
+ st_debug("mp_run_on_all_cpus for st_readmsr(0x%x) failed\n", reg);
+ return;
+ }
+}
+
+static st_status st_intel_microcode(void)
+{
+ st_status rc = ST_PASSED;
+ st_debug("Starting %s\n", __func__);
+ st_debug("Test: Is microcode loaded? MSR(IA32_BIOS_SIGN_ID/0x%x)\n", IA32_BIOS_SIGN_ID);
+ cpu_count = get_cpu_count();
+ st_debug("CPU count is %d\n", cpu_count);
+ st_readmsr_all_cpus(IA32_BIOS_SIGN_ID);
+
+ for (int i = 0; i < cpu_count; i++) {
+ st_debug("[cpu%d]: 0x%x %x\n", i, msr_per_cpu.value[i].hi, msr_per_cpu.value[i].lo);
+ if (!((msr_per_cpu.value[i].hi != 0) || (msr_per_cpu.value[i].lo != 0)))
+ rc = ST_FAILED;
+ }
+
+ return rc;
+}
+
+static struct self_test_t intel_cpu_selftests[] = {
+ {.id = ST_CPU_INTEL_MICROCODE, .exec = st_intel_microcode, .state = BS_PAYLOAD_LOAD, .when = BS_ON_EXIT},
+ {.id = ST_INVALID_ID, } /* Terminator */
+};
+
+REGISTER_SELFTEST(intel_cpu_selftests);
diff --git a/src/include/self_test_id.h b/src/include/self_test_id.h
index f556fdb9..d13d287 100644
--- a/src/include/self_test_id.h
+++ b/src/include/self_test_id.h
@@ -4,8 +4,10 @@
#define _SELF_TEST_ID_H_
#define ST_INVALID_ID 0x00
+#define ST_CPU_INTEL_MICROCODE 0x01
#define ST_ID_TO_NAME_TABLE \
- {ST_INVALID_ID, "Invalid Test"}
+ {ST_INVALID_ID, "Invalid Test"},\
+ {ST_CPU_INTEL_MICROCODE, "Intel_microcode_patch_loaded"}
#endif /* _SELF_TEST_ID_H_ */
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