Angel Pons has uploaded this change for review.

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sb/intel/lynxpoint: Relocate SATA clock gating write

Do it in the same place as Broadwell.

Change-Id: I50bd951af52d03ad986dbf4bf70bdae348fa994b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/sata.c
2 files changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/47034/1

diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 4286e6ca..6b47b8a 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -467,8 +467,6 @@
 
 	RCBA32_OR(0x3434, 0x7); // LP LPC
 
-	RCBA32_AND_OR(0x333c, 0xffcfffff, 0x00c00000); // SATA
-
 	RCBA32_OR(0x38c0, 0x3c07); // SPI Dynamic
 
 	pch_iobp_update(0xCF000000, ~0, 0x00007001);
diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index ef7ebcf..167f4df 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -215,6 +215,7 @@
 	if (pch_is_lp()) {
 		sir_write(dev, 0x54, 0xcf000f0f);
 		sir_write(dev, 0x58, 0x00190000);
+		RCBA32_AND_OR(0x333c, 0xffcfffff, 0x00c00000);
 	}
 
 	reg32 = pci_read_config32(dev, 0x300);

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