Attention is currently required from: Jérémy Compostella.

Benjamin Doron has uploaded this change for review.

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cpu/x86: Support runtime page tables on APs

APs should use the same page table as the BSP.

Change-Id: I61aa44e5301aab7a4c127d58a7caf815d3a7d74d
Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
---
M src/cpu/x86/mp_init.c
M src/cpu/x86/sipi_vector.S
2 files changed, 6 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79864/1

diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index d3af6ecc..bcf8205 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -7,6 +7,7 @@
 #include <cpu/cpu.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
+#include <cpu/x86/cr.h>
 #include <cpu/x86/gdt.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/name.h>
@@ -99,6 +100,7 @@
 	uint32_t msr_count;
 	uint32_t c_handler;
 	atomic_t ap_count;
+	uint32_t ap_page_tables;
 } __packed;
 
 /* This also needs to match the assembly code for saved MSR encoding. */
@@ -231,6 +233,7 @@
 	sp->per_cpu_segment_selector = per_cpu_segment_selector;
 	sp->stack_size = CONFIG_AP_STACK_SIZE;
 	sp->stack_top = (uintptr_t)ap_stack + ARRAY_SIZE(ap_stack);
+	sp->ap_page_tables = (uint32_t)read_cr3();
 }
 
 static const unsigned int fixed_mtrrs[NUM_FIXED_MTRRS] = {
diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S
index 401e8e2..57f37ec 100644
--- a/src/cpu/x86/sipi_vector.S
+++ b/src/cpu/x86/sipi_vector.S
@@ -39,6 +39,8 @@
 .long 0
 ap_count:
 .long 0
+ap_page_tables:
+.long 0
 
 #define CR0_CLEAR_FLAGS_CACHE_ENABLE (CR0_CD | CR0_NW)
 #define CR0_SET_FLAGS (CR0_CLEAR_FLAGS_CACHE_ENABLE | CR0_PE)
@@ -223,7 +225,7 @@
 
 #if ENV_X86_64
 	/* Get page table address */
-	movl	$(CONFIG_ARCH_X86_64_PGTBL_LOC), %eax
+	movl	ap_page_tables, %eax
 
 	/* entry64.inc preserves ebx, esi, edi, ebp */
 #include <cpu/x86/64bit/entry64.inc>

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