Subrata Banik has uploaded this change for review.

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arch/x86: smbios write 7 table using deterministic cache helper functions

This patch makes use of deterministic cache helper functions, for example:
cpu_get_cache_type(), cpu_get_cache_level() etc. from arch/x86/cpu_common.c
file.

Also, change argument for get_number_of_caches() function that receives
cpu_get_max_cache_share() data directly.

TEST=Able to dump SMBIOS Table 7 with this CL, no changes seen in output.
SMBIOS Cache Information :
cache_type = 1
level = 1
assoc=12
par=1
line_size=64
number_of_sets = 64
sets=2
@@ cache_size 0x48000 bytes

cache_type = 2
level = 1
assoc=8
par=1
line_size=64
number_of_sets = 64
sets=2
@@ cache_size 0x30000 bytes

cache_type = 3
level = 2
assoc=10
par=1
line_size=64
number_of_sets = 2048
sets=8
@@ cache_size 0x140000 bytes

cache_type = 3
level = 3
assoc=12
par=1
line_size=64
number_of_sets = 16384
sets=64
@@ cache_size 0xc00000 bytes

Change-Id: Iedbd3b745629dea57c3ad6b0d187eab2bcc3f7d3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
---
M src/arch/x86/smbios.c
1 file changed, 13 insertions(+), 33 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/56121/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index e686992..cd5a50c 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -489,9 +489,8 @@
return 0; /* Unknown */
}

-static size_t get_number_of_caches(struct cpuid_result res_deterministic_cache)
+static size_t get_number_of_caches(const size_t max_logical_cpus_sharing_cache)
{
- size_t max_logical_cpus_sharing_cache = 0;
size_t number_of_cpus_per_package = 0;
size_t max_logical_cpus_per_package = 0;
struct cpuid_result res;
@@ -503,8 +502,6 @@

max_logical_cpus_per_package = (res.ebx >> 16) & 0xff;

- max_logical_cpus_sharing_cache = ((res_deterministic_cache.eax >> 14) & 0xfff) + 1;
-
/* Check if it's last level cache */
if (max_logical_cpus_sharing_cache == max_logical_cpus_per_package)
return 1;
@@ -797,30 +794,13 @@
int *max_struct_size,
struct smbios_type4 *type4)
{
- struct cpuid_result res;
- unsigned int cnt = 0;
+ unsigned int cnt = CACHE_L0;
int len = 0;
- u32 leaf;

if (!cpu_have_cpuid())
return len;

- if (cpu_is_intel()) {
- res = cpuid(0);
- if (res.eax < 4)
- return len;
- leaf = 4;
- } else if (cpu_is_amd()) {
- res = cpuid(0x80000000);
- if (res.eax < 0x80000001)
- return len;
-
- res = cpuid(0x80000001);
- if (!(res.ecx & (1 << 22)))
- return len;
-
- leaf = 0x8000001d;
- } else {
+ if (cpu_check_deterministic_cache_cpuid_supported() == CPUID_TYPE_INVALID) {
printk(BIOS_DEBUG, "SMBIOS: Unknown CPU\n");
return len;
}
@@ -829,16 +809,15 @@
enum smbios_cache_associativity associativity;
enum smbios_cache_type type;

- res = cpuid_ext(leaf, cnt++);
-
- const u8 cache_type = CPUID_CACHE_TYPE(res);
- const u8 level = CPUID_CACHE_LEVEL(res);
- const size_t assoc = CPUID_CACHE_WAYS_OF_ASSOC(res) + 1;
- const size_t partitions = CPUID_CACHE_PHYS_LINE(res) + 1;
- const size_t cache_line_size = CPUID_CACHE_COHER_LINE(res) + 1;
- const size_t number_of_sets = CPUID_CACHE_NO_OF_SETS(res) + 1;
+ const u8 cache_type = cpu_get_cache_type(cnt);
+ const u8 level = cpu_get_cache_level(cnt);
+ const size_t assoc = cpu_get_cache_ways_assoc_info(cnt);
+ const size_t partitions = cpu_get_cache_phy_partition_info(cnt);
+ const size_t cache_line_size = cpu_get_cache_line_size(cnt);
+ const size_t number_of_sets = cpu_get_cache_sets(cnt);
+ const size_t cache_share = cpu_get_max_cache_share(cnt);
const size_t cache_size = assoc * partitions * cache_line_size * number_of_sets
- * get_number_of_caches(res);
+ * get_number_of_caches(cache_share);

if (!cache_type)
/* No more caches in the system */
@@ -859,7 +838,7 @@
break;
}

- if (CPUID_CACHE_FULL_ASSOC(res))
+ if (cpu_is_cache_full_assoc(cnt))
associativity = SMBIOS_CACHE_ASSOCIATIVITY_FULL;
else
associativity = smbios_cache_associativity(assoc);
@@ -883,6 +862,7 @@
break;
}
}
+ cnt++;
};

return len;

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iedbd3b745629dea57c3ad6b0d187eab2bcc3f7d3
Gerrit-Change-Number: 56121
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-MessageType: newchange