Jacob Garber has uploaded this change for review.

View Change

[TEST] Enable link time optimization

Enable LTO to shake out the bugs.

Current problems:
- GCC does not track symbol origins when using LTO, so it must be
disabled for AGESA so it can be excluded from the illegal_globals check.
- GCC segfaults when compiling ARMV7
- Most of the Google boards do not compile because of a missing
reference to _watchdog_tombstone

Change-Id: I37474d4adbf653729bb2e631a1ff812b4319c17a
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
---
M src/Kconfig
M src/vendorcode/amd/agesa/Makefile.inc
2 files changed, 7 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/40815/1
diff --git a/src/Kconfig b/src/Kconfig
index e4821e8..375bca2 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -116,7 +116,7 @@

config LTO
bool "Use link time optimization (LTO)"
- default n
+ default y
depends on COMPILER_GCC
help
Compile with link time optimization. This can often decrease the
diff --git a/src/vendorcode/amd/agesa/Makefile.inc b/src/vendorcode/amd/agesa/Makefile.inc
index b96af84..3e4a53c 100644
--- a/src/vendorcode/amd/agesa/Makefile.inc
+++ b/src/vendorcode/amd/agesa/Makefile.inc
@@ -14,6 +14,12 @@

AGESA_CFLAGS := -march=k8-sse3 -mtune=k8-sse3 -fno-strict-aliasing

+# GCC currently does not track symbol origins when using LTO, so
+# AGESA gets caught in the illegal_globals check. Disable for now.
+ifeq ($(CONFIG_LTO),y)
+AGESA_CFLAGS += -fno-lto
+endif
+
CFLAGS_x86_32 += $(AGESA_CFLAGS)
CFLAGS_x86_64 += $(AGESA_CFLAGS)


To view, visit change 40815. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I37474d4adbf653729bb2e631a1ff812b4319c17a
Gerrit-Change-Number: 40815
Gerrit-PatchSet: 1
Gerrit-Owner: Jacob Garber <jgarber1@ualberta.ca>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-MessageType: newchange