Patrick Rudolph has uploaded this change for review.

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arch/x86: x86_64 implies SSE2 support

Enable SSE2 when compiling for x86_64.

Tested on qemu.

Change-Id: I3cdc584c97016e15513df663a54a7bdb549a73e4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/arch/x86/Kconfig
M src/arch/x86/bootblock_crt0.S
2 files changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/44869/1

diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index d906436..d0e4693 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -33,22 +33,27 @@
 config ARCH_BOOTBLOCK_X86_64
 	bool
 	select ARCH_X86
+	select SSE2
 
 config ARCH_VERSTAGE_X86_64
 	bool
 	select ARCH_X86
+	select SSE2
 
 config ARCH_ROMSTAGE_X86_64
 	bool
 	select ARCH_X86
+	select SSE2
 
 config ARCH_POSTCAR_X86_64
 	bool
 	default ARCH_ROMSTAGE_X86_64 && POSTCAR_STAGE
+	select SSE2
 
 config ARCH_RAMSTAGE_X86_64
 	bool
 	select ARCH_X86
+	select SSE2
 
 if ARCH_X86
 
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
index 9f45413..9e17b7e 100644
--- a/src/arch/x86/bootblock_crt0.S
+++ b/src/arch/x86/bootblock_crt0.S
@@ -52,9 +52,15 @@
 
 #if CONFIG(SSE)
 enable_sse:
+#if ENV_X86_32
 	mov	%cr4, %eax
 	or	$CR4_OSFXSR, %ax
 	mov	%eax, %cr4
+#else
+	mov	%cr4, %rax
+	or	$CR4_OSFXSR, %ax
+	mov	%rax, %cr4
+#endif
 #endif /* CONFIG(SSE) */
 
 	/* We're done. Now it's up to platform-specific code */

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