HAOUAS Elyes has uploaded this change for review.
[test] Don't compile vboot when it is not set
Change-Id: I9adbc227ac6f91caf194a5212a4503dbaa0e36ad
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
---
M src/arch/x86/postcar_loader.c
M src/cpu/intel/car/romstage.c
M src/device/pci_device.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/lib/bootmode.c
M src/lib/cbfs.c
M src/lib/coreboot_table.c
M src/lib/prog_loaders.c
M src/southbridge/intel/common/pmbase.c
M src/southbridge/intel/common/rtc.c
10 files changed, 50 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/37801/1
diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c
index b53cbf8..f60673e 100644
--- a/src/arch/x86/postcar_loader.c
+++ b/src/arch/x86/postcar_loader.c
@@ -23,7 +23,9 @@
#include <romstage_handoff.h>
#include <stage_cache.h>
#include <timestamp.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vboot_common.h>
+#endif
static inline void stack_push(struct postcar_frame *pcf, uint32_t val)
{
@@ -171,9 +173,9 @@
.cbmem_id = CBMEM_ID_AFTER_CAR,
.prog = prog,
};
-
+#if CONFIG(VBOOT)
vboot_run_logic();
-
+#endif
if (prog_locate(prog))
die_with_post_code(POST_INVALID_ROM,
"Failed to locate after CAR program.\n");
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index bd6a5a9..bd894d3 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -21,7 +21,9 @@
#include <commonlib/helpers.h>
#include <program_loading.h>
#include <timestamp.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vboot_common.h>
+#endif
/* If we do not have a constrained _car_stack region size, use the
following as a guideline for acceptable stack usage. */
@@ -51,10 +53,10 @@
for (i = 0; i < num_guards; i++)
stack_base[i] = stack_guard;
-
+#if CONFIG(VBOOT)
if (CONFIG(VBOOT_EARLY_EC_SYNC))
vboot_sync_ec();
-
+#endif
mainboard_romstage_entry();
/* Check the stack. */
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 36b7c82..99bc539 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -32,7 +32,9 @@
#include <device/pciexp.h>
#include <device/hypertransport.h>
#include <pc80/i8259.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vbnv.h>
+#endif
#include <timestamp.h>
#include <types.h>
@@ -683,11 +685,12 @@
{
static int should_run = -1;
+#if CONFIG(VBOOT)
if (CONFIG(VENDORCODE_ELTAN_VBOOT))
if (rom != NULL)
if (!verified_boot_should_run_oprom(rom))
return 0;
-
+#endif
if (should_run >= 0)
return should_run;
diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index d3efdec..6622e0b 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -21,8 +21,10 @@
#include <rtc.h>
#include <string.h>
#include <cbfs.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vbnv.h>
#include <security/vboot/vbnv_layout.h>
+#endif
#include <types.h>
/* There's no way around this include guard. option_table.h is autogenerated */
@@ -164,6 +166,7 @@
return clear_cmos;
}
+#if CONFIG(VBOOT)
static void cmos_init_vbnv(bool invalid)
{
uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE];
@@ -178,15 +181,18 @@
if (__cmos_init(invalid))
save_vbnv_cmos(vbnv);
}
+#endif
void cmos_init(bool invalid)
{
if (ENV_SMM)
return;
+#if CONFIG(VBOOT)
if (CONFIG(VBOOT_VBNV_CMOS))
cmos_init_vbnv(invalid);
else
+#endif
__cmos_init(invalid);
}
diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c
index 06f6d05..102ba39 100644
--- a/src/lib/bootmode.c
+++ b/src/lib/bootmode.c
@@ -15,8 +15,10 @@
#include <assert.h>
#include <bootmode.h>
+#if CONFIG(VBOOT)
#include <security/vboot/misc.h>
#include <vb2_api.h>
+#endif
static int gfx_init_done = -1;
@@ -35,13 +37,13 @@
int display_init_required(void)
{
/* For vboot, always honor VB2_CONTEXT_DISPLAY_INIT. */
- if (CONFIG(VBOOT)) {
+#if CONFIG(VBOOT)
/* Must always select MUST_REQUEST_DISPLAY when using this
function. */
if (!CONFIG(VBOOT_MUST_REQUEST_DISPLAY))
dead_code();
return vboot_get_context()->flags & VB2_CONTEXT_DISPLAY_INIT;
- }
+#endif
/* By default always initialize display. */
return 1;
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 636ff70..85ff17d 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -26,7 +26,9 @@
#include <symbols.h>
#include <timestamp.h>
#include <fmap.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vboot_crtm.h>
+#endif
#define ERROR(x...) printk(BIOS_ERR, "CBFS: " x)
#define LOG(x...) printk(BIOS_INFO, "CBFS: " x)
@@ -44,7 +46,7 @@
return -1;
int ret = cbfs_locate(fh, &rdev, name, type);
-
+#if CONFIG(VBOOT)
if (CONFIG(VBOOT_ENABLE_CBFS_FALLBACK) && ret) {
/*
@@ -63,7 +65,7 @@
if (!ret)
if (vboot_measure_cbfs_hook(fh, name))
return -1;
-
+#endif
return ret;
}
@@ -299,7 +301,9 @@
.locate = cbfs_default_region_device,
};
+#if CONFIG(VBOOT)
extern const struct cbfs_locator vboot_locator;
+#endif
static const struct cbfs_locator *locators[] = {
#if CONFIG(VBOOT)
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index e42cb3b..96783be 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -33,8 +33,10 @@
#include <bootmem.h>
#include <bootsplash.h>
#include <spi_flash.h>
+#if CONFIG(VBOOT)
#include <security/vboot/misc.h>
#include <security/vboot/vbnv_layout.h>
+#endif
#if CONFIG(USE_OPTION_TABLE)
#include <option_table.h>
#endif
@@ -204,6 +206,7 @@
}
}
+#if CONFIG(VBOOT)
static void lb_vbnv(struct lb_header *header)
{
#if CONFIG(PC80_SYSTEM)
@@ -216,6 +219,7 @@
vbnv->range_size = VBOOT_VBNV_BLOCK_SIZE;
#endif
}
+#endif /* CONFIG_VBOOT */
#endif /* CONFIG_CHROMEOS */
__weak uint32_t board_id(void) { return UNDEFINED_STRAPPING_ID; }
@@ -332,7 +336,9 @@
{CBMEM_ID_WIFI_CALIBRATION, LB_TAG_WIFI_CALIBRATION},
{CBMEM_ID_TCPA_LOG, LB_TAG_TCPA_LOG},
{CBMEM_ID_FMAP, LB_TAG_FMAP},
+#if CONFIG(VBOOT)
{CBMEM_ID_VBOOT_WORKBUF, LB_TAG_VBOOT_WORKBUF},
+#endif
};
int i;
@@ -537,10 +543,11 @@
#if CONFIG(CHROMEOS)
/* Record our GPIO settings (ChromeOS specific) */
lb_gpios(head);
-
+#if CONFIG(VBOOT
/* pass along VBNV offsets in CMOS */
lb_vbnv(head);
#endif
+#endif
/* Add strapping IDs if available */
lb_board_id(head);
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 5787496..46a4c38 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -30,8 +30,9 @@
#include <symbols.h>
#include <timestamp.h>
#include <fit_payload.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vboot_common.h>
-
+#endif
/* Only can represent up to 1 byte less than size_t. */
const struct mem_region_device addrspace_32bit =
MEM_REGION_DEV_RO_INIT(0, ~0UL);
@@ -58,8 +59,9 @@
struct prog romstage =
PROG_INIT(PROG_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage");
+#if CONFIG(VBOOT)
vboot_run_logic();
-
+#endif
if (prog_locate(&romstage))
goto fail;
@@ -138,8 +140,9 @@
!CONFIG(NO_STAGE_CACHE))
run_ramstage_from_resume(&ramstage);
+#if CONFIG(VBOOT)
vboot_run_logic();
-
+#endif
if (prog_locate(&ramstage))
goto fail;
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
index ff0410a..5705852 100644
--- a/src/southbridge/intel/common/pmbase.c
+++ b/src/southbridge/intel/common/pmbase.c
@@ -20,7 +20,9 @@
#include <device/device.h>
#include <device/pci.h>
#include <assert.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vboot_common.h>
+#endif
#include "pmbase.h"
#include "pmutil.h"
@@ -95,6 +97,7 @@
return inb(lpc_get_pmbase() + addr);
}
+#if CVONFIG(VBOOT)
int vboot_platform_is_resuming(void)
{
u16 reg16 = read_pmbase16(PM1_STS);
@@ -104,3 +107,4 @@
return acpi_sleep_from_pm1(reg16) == ACPI_S3;
}
+#endif
diff --git a/src/southbridge/intel/common/rtc.c b/src/southbridge/intel/common/rtc.c
index 3ee12aa..a1dcdde 100644
--- a/src/southbridge/intel/common/rtc.c
+++ b/src/southbridge/intel/common/rtc.c
@@ -17,7 +17,9 @@
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
+#if CONFIG(VBOOT)
#include <security/vboot/vbnv.h>
+#endif
#include <pc80/mc146818rtc.h>
#include <elog.h>
#include "pmutil.h"
@@ -52,7 +54,9 @@
cmos_init(rtc_failed);
}
+#if CONFIG(VBOOT)
int vbnv_cmos_failed(void)
{
return rtc_failure();
}
+#endif
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