Mathew King has uploaded this change for review.

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soc/amd/cezanne: Add reset.c

Add an empty reset.c so that mainboards can use this chip.

Change-Id: Ie4f9712ff2b21f27c46f0f0d99dfd8a5e9a5db4f
---
M src/soc/amd/cezanne/Makefile.inc
A src/soc/amd/cezanne/reset.c
2 files changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/48534/1

diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index df3355e..700b55a 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -5,10 +5,13 @@
 all-y += config.c
 
 bootblock-y	+= bootblock.c
+bootblock-y	+= reset.c
 
 romstage-y	+= romstage.c
+romstage-y	+= reset.c
 
 ramstage-y	+= chip.c
+ramstage-y	+= reset.c
 
 CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include
 
diff --git a/src/soc/amd/cezanne/reset.c b/src/soc/amd/cezanne/reset.c
new file mode 100644
index 0000000..7a280f2
--- /dev/null
+++ b/src/soc/amd/cezanne/reset.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <reset.h>
+
+void do_board_reset(void)
+{
+	/* TODO */
+}

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