Werner Zeh has uploaded this change for review.

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acpi: Sort the reported APIC-IDs in the MADT table

coreboot performs MP-Init in a parallel way. That leads to the fact
that the order, in which the CPUs are woken up, can vary from boot to
boot. The creation of the MADT table just parses the devicetree and
takes the CPUs reported there as it is for creating the single local
APIC entries. Therefore, The OS will see different order of CPUs.
There are CPUs out there (like Apollo Lake for example) which have
shared caches on core-level and if the order is random this can end up
in assigning cores to different tasks or even OSes (in a virtual
enviroinment) which uses the same cache. This in turn will produce
performance penalties across these distributed tasks/OSes.

Though there is a way on discover the core- and cache-topology it will
in the end be necessary to take the APIC-ID into account. To simplify
it, one can achieve the same output by sorting the APIC-IDs in an
ascending order. This will lead to the fact that CPUs that share a given
cache will be reported right next to each other in the MADT.

Change-Id: Ida74f9f00a4e2a03107a2124014403de60462735
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
---
M src/arch/x86/acpi.c
1 file changed, 8 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/31545/1
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
index 0c85d3a..c7b9214 100644
--- a/src/arch/x86/acpi.c
+++ b/src/arch/x86/acpi.c
@@ -8,7 +8,7 @@
* Copyright (C) 2005-2009 coresystems GmbH
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>,
* Raptor Engineering
- * Copyright (C) 2016-2017 Siemens AG
+ * Copyright (C) 2016-2019 Siemens AG
*
* ACPI FADT, FACS, and DSDT table support added by
* Nick Barker <nick.barker9@btinternet.com>, and those portions
@@ -47,6 +47,7 @@
#include <cpu/x86/lapic_def.h>
#include <cpu/cpu.h>
#include <cbfs.h>
+#include <sort.h>

u8 acpi_checksum(u8 *table, u32 length)
{
@@ -148,7 +149,7 @@
unsigned long acpi_create_madt_lapics(unsigned long current)
{
struct device *cpu;
- int index = 0;
+ int index, apic_ids[CONFIG_MAX_CPUS], num_cpus = 0;

for (cpu = all_devices; cpu; cpu = cpu->next) {
if ((cpu->path.type != DEVICE_PATH_APIC) ||
@@ -157,9 +158,12 @@
}
if (!cpu->enabled)
continue;
+ apic_ids[num_cpus++] = cpu->path.apic.apic_id;
+ }
+ bubblesort(apic_ids, num_cpus, NUM_ASCENDING);
+ for (index = 0; index < num_cpus; index++) {
current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current,
- index, cpu->path.apic.apic_id);
- index++;
+ index, apic_ids[index]);
}

return current;

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ida74f9f00a4e2a03107a2124014403de60462735
Gerrit-Change-Number: 31545
Gerrit-PatchSet: 1
Gerrit-Owner: Werner Zeh <werner.zeh@siemens.com>
Gerrit-MessageType: newchange