Yidi Lin uploaded patch set #42 to this change.

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soc/mediatek/mt8192: ufs: Disable reference clock

UFS reference clock (refclk) is enabled by default, which will cause
the UFSHCI to hold the SPM signal and lead to suspend failure. Since
UFS kernel driver is not built-in, disable refclk in coreboot stage.

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Change-Id: If11c1b756ad1a0b85f1005f56a6cb4648c687cf0
---
M src/soc/mediatek/mt8192/Makefile.inc
M src/soc/mediatek/mt8192/include/soc/addressmap.h
A src/soc/mediatek/mt8192/include/soc/ufs.h
M src/soc/mediatek/mt8192/soc.c
A src/soc/mediatek/mt8192/ufs.c
5 files changed, 32 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/46408/42

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If11c1b756ad1a0b85f1005f56a6cb4648c687cf0
Gerrit-Change-Number: 46408
Gerrit-PatchSet: 42
Gerrit-Owner: Yidi Lin <yidi.lin@mediatek.com>
Gerrit-Reviewer: Chaotian Jing <chaotian.jing@mediatek.com>
Gerrit-Reviewer: Hung-Te Lin <hungte@chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Xi Chen <xixi.chen@mediatek.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-CC: Yu-Ping Wu <yupingso@google.com>
Gerrit-MessageType: newpatchset