Sindhoor Tilak uploaded patch set #4 to this change.

View Change

post_code: add missing postcode calls

The change adds postcode calls wherever necessary
on top of the updated set of postcode defines

Change-Id: Ia75cd863bf6ffac2c91ff78aefabc5327b1c138b
Signed-off-by: Sindhoor Tilak <sindhoor@sin9yt.net>
---
M src/arch/x86/bootblock_crt0.S
M src/arch/x86/postcar_loader.c
M src/console/init.c
M src/cpu/intel/car/p3/cache_as_ram.S
M src/cpu/intel/car/p4-netburst/cache_as_ram.S
M src/cpu/intel/haswell/romstage.c
M src/drivers/amd/agesa/romstage.c
M src/drivers/intel/fsp1_1/cache_as_ram.S
M src/northbridge/intel/pineview/romstage.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
M src/soc/intel/xeon_sp/romstage.c
M src/southbridge/intel/common/finalize.c
14 files changed, 21 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/43000/4

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia75cd863bf6ffac2c91ff78aefabc5327b1c138b
Gerrit-Change-Number: 43000
Gerrit-PatchSet: 4
Gerrit-Owner: Sindhoor Tilak <sindhoor@sin9yt.net>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Damien Zammit
Gerrit-Reviewer: Huang Jin <huang.jin@intel.com>
Gerrit-Reviewer: Lee Leahy <leroy.p.leahy@intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset