Arthur Heymans has uploaded this change for review.

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arch/x86/car.ld: Align the stack at buildtime

Change-Id: I4abf58619e4a09563451683960918c8794f186dc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/arch/x86/car.ld
M src/include/memlayout.h
2 files changed, 7 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/48504/1

diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 9f8c2ad..aa28b43 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -27,9 +27,8 @@
 	/* Stack for CAR stages. Since it persists across all stages that
 	 * use CAR it can be reused. The chipset/SoC is expected to provide
 	 * the stack size. */
-	_car_stack = .;
-	. += CONFIG_DCACHE_BSP_STACK_SIZE;
-	_ecar_stack = .;
+	CAR_STACK(., CONFIG_DCACHE_BSP_STACK_SIZE)
+
 	/* The pre-ram cbmem console as well as the timestamp region are fixed
 	 * in size. Therefore place them above the car global section so that
 	 * multiple stages (romstage and verstage) have a consistent
diff --git a/src/include/memlayout.h b/src/include/memlayout.h
index bf830b7..413248a 100644
--- a/src/include/memlayout.h
+++ b/src/include/memlayout.h
@@ -60,6 +60,11 @@
 #define EARLYRAM_STACK(addr, size) \
 	REGION(earlyram_stack, addr, size, ARCH_STACK_ALIGN_SIZE)
 
+#define CAR_STACK(addr, size) \
+	REGION(car_stack, addr, size, ARCH_STACK_ALIGN_SIZE) \
+	_ = ASSERT(. == ALIGN(ARCH_STACK_ALIGN_SIZE), \
+		   STR(_ecar_stack must be aligned to ARCH_STACK_ALIGN_SIZE));
+
 /* Use either CBFS_CACHE (unified) or both (PRERAM|POSTRAM)_CBFS_CACHE */
 #define CBFS_CACHE(addr, size) \
 	REGION(cbfs_cache, addr, size, 4) \

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