Marshall Dawson has uploaded this change for review.
soc/amd/picasso: Fix the PSP SMI trigger info
Assign one of the reserved triggers in SmiTrig0 to the PSP and correct
the values passed during the MboxBiosCmdSmmInfo call.
The #define of SMITYPE_PSP 33 is still correct and is intentionally
unmodified.
This patch should be innocuous as the system doesn't currently support
SMI-based features of the PSP. The call only exists so the PSP will
honor a mailbox command during S3 suspend.
BUG=b:171815390
TEST=Run SST on Morphius
BRANCH=Zork
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I74029271a522a4f23e54fd76f99a8e3eb0dd4d55
---
M src/soc/amd/picasso/include/soc/smi.h
M src/soc/amd/picasso/psp.c
2 files changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/46854/1
diff --git a/src/soc/amd/picasso/include/soc/smi.h b/src/soc/amd/picasso/include/soc/smi.h
index a629fc5..0529ef6 100644
--- a/src/soc/amd/picasso/include/soc/smi.h
+++ b/src/soc/amd/picasso/include/soc/smi.h
@@ -160,6 +160,7 @@
#define SMI_TIMER_EN (1 << 15)
#define SMI_REG_SMITRIG0 0x98
+# define SMITRIG0_PSP (1 << 25)
# define SMITRG0_EOS (1 << 28)
# define SMI_TIMER_SEL (1 << 29)
# define SMITRG0_SMIENB (1 << 31)
diff --git a/src/soc/amd/picasso/psp.c b/src/soc/amd/picasso/psp.c
index e40d395..702b0d9 100644
--- a/src/soc/amd/picasso/psp.c
+++ b/src/soc/amd/picasso/psp.c
@@ -27,11 +27,11 @@
if (!trig)
return;
- trig->address = (uintptr_t)acpimmio_smi + SMI_REG_CONTROL2;
+ trig->address = (uintptr_t)acpimmio_smi + SMI_REG_SMITRIG0;
trig->address_type = SMM_TRIGGER_MEM;
trig->value_width = SMM_TRIGGER_DWORD;
- trig->value_and_mask = 0xfdffffff;
- trig->value_or_mask = 0x02000000;
+ trig->value_and_mask = ~SMITRIG0_PSP;
+ trig->value_or_mask = SMITRIG0_PSP;
}
void soc_fill_smm_reg_info(struct smm_register_info *reg)
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