Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15777
-gerrit
commit 613481b14e67c9729f6a578c6fddac072b5f2738 Author: Shankar, Vaibhav vaibhav.shankar@intel.com Date: Mon Jul 18 12:07:34 2016 -0700
intel/amenia: Add GPIO changes to assert SLP_S0/Reset signal
PMIC/PMU: Set the iosstates for PMIC to assert the reset signal, PMU to assert SLP_S0 signal.
Change-Id: Iec2dd659ea21f07d0bfe74194756786375cf775c Signed-off-by: Shankar, Vaibhav vaibhav.shankar@intel.com Signed-off-by: Venkateswarlu Vinjamuri venkateswarlu.v.vinjamuri@intel.com --- src/mainboard/intel/amenia/gpio.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/intel/amenia/gpio.h b/src/mainboard/intel/amenia/gpio.h index a3b7611..d79ddcf 100644 --- a/src/mainboard/intel/amenia/gpio.h +++ b/src/mainboard/intel/amenia/gpio.h @@ -120,7 +120,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(PMU_PLTRST_B, NONE, DEEP, NF1), /* PMU_PLTRST_N */ PAD_CFG_NF(PMU_PWRBTN_B, UP_20K, DEEP, NF1), /* PMU_PWRBTN_N */ PAD_CFG_NF(PMU_RESETBUTTON_B, NONE, DEEP, NF1), /* PMU_RSTBTN_N */ - PAD_CFG_NF(PMU_SLP_S0_B, NONE, DEEP, NF1), /* PMU_SLP_S0_N */ + PAD_CFG_NF_IOSTATE(PMU_SLP_S0_B, NONE, DEEP, NF1, IGNORE), /* PMU_SLP_S0_N */ PAD_CFG_NF(PMU_SLP_S3_B, NONE, DEEP, NF1), /* PMU_SLP_S3_N */ PAD_CFG_NF(PMU_SLP_S4_B, NONE, DEEP, NF1), /* PMU_SLP_S4_N */ PAD_CFG_NF(PMU_SUSCLK, NONE, DEEP, NF1), /* PMU_SUSCLK */ @@ -164,7 +164,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(PMC_SPI_CLK, DN_20K), /* PMC_SPI_CLK */ /* PMIC */ PAD_NC(PMIC_PWRGOOD, NONE), /* PMIC_PWRGOOD */ - PAD_NC(PMIC_RESET_B, NONE), /* PMIC_RESET_B */ + PAD_CFG_NF_IOSTATE(PMIC_RESET_B, NATIVE, DEEP, NF1, IGNORE), /* PMIC_RESET_B */ PAD_NC(GPIO_213, NONE), /* PMIC_SDWN_B */ PAD_NC(GPIO_214, DN_20K), /* PMIC_BCUDISW2 */ PAD_NC(GPIO_215, DN_20K), /* PMIC_BCUDISCRIT */